| B. Sarikaya, G. von Bochmann, and E. Cerny, "A test design methodology for protocol testing," IEEE Trans. Software Engineering, vol. 13, pp. 518--531, May 1987. |
....just enough to generate a set of tests that is feasible and practical in size. Determining which features to expand in the general case is the difficult aspect of this research. Test Case Generation Research: Conformance test generation techniques reported in literature [1] 7] 43] 50] [59], 66] using a deter7 Pure FSM Tests Approximate FSM 1. timing constraint problem 2. controllability problem 3. conflicting timers Estelle (EFSM) specification Constrained Postman Tours Fecko, Uyar, Amer, Sethi Conversion Too difficult Fig. 6. Test Generation from Extended ....
....the tests already delivered to CECOM contain approximately 10,000 test steps. It is clear that manually generating test sets of this size from the protocol textual description is not a trivial task. A number of conformance test generation techniques have been proposed [1] 7] 9] 50] 57] [59], 63] 66] each of which is expected to give better results for a certain class of protocol specifications depending on the nature and size of the protocol. The experience obtained in generating tests for 188220 suggests that to successfully test today s complex protocols by using formal ....
B. Sarikaya, G. von Bochmann, and E. Cerny. A test design methodology for protocol testing. IEEE Trans. Softw. Eng., 13(5):518--531, May 1987.
....is expanded partially just enough to generate a set of tests that is feasible and practical in size. Determining which features to expand in the general case is the difficult aspect of this research. Test Case Generation Research: Conformance test generation techniques reported in literature [2, 8, 47, 54, 64, 71], using a deterministic finite state machine (FSM) model of a protocol specification, focus on the optimization of Pure FSM Tests Approximate FSM 1. timing constraint problem 2. controllability problem 3. conflicting timers Estelle (EFSM) specification ....
....automated test generation a more complex task due to possible inconsistencies among the action and condition variables [22] Test generation from EFSM models has been an active research area. Sarikaya et al. used the functional program testing approach to generate test sequences from the EFSMs [64]. Software data flow testing approaches have been used to generate tests for the communication protocols [70, 71, 72] Ural applied the all uses [72, 61] criterion, used for testing software written in block structured programming languages, to Estelle [12, 13] specification of protocols. Miller ....
[Article contains additional citation context not shown here]
B. Sarikaya, G. von Bochmann, and E. Cerny. A test design methodology for protocol testing. IEEE Trans. Softw. Eng., 13(5):518--531, May 1987.
....of formal specification is conformance testing. A general framework and methodology of conformance testing is studied within ISO [ISO 9646, Ray 87] The crucial problem which remains unsolved is the generation of an adequate set of testing scenarios from the formal specification [FaL 87, Sar 87, SBC 87, SaD 88, Hog 89, SiL 89, VCI 89, PhG 91] 3 In LOTOS, the concept of a canonical tester associated with a specification has been defined and studied in [BrS 86, Bri 87, Bri 88] and extended and brought into play in [Ald 89, Wez 89, WBL 91] The canonical tester is itself a LOTOS specification ....
B. Sarikaya, G. Bochmann, E. Cerny, A Test Design Methodology for Protocol Testing, IEEE Transactions on Software Engineering, Vol. 13, No. 5, 1987, 518-531.
....is partially expanded just enough to generate a set of tests that is feasible and practical in size. Determining which features to expand in the general case is the difficult aspect of this research. 2. 1 Test Case Generation Research Conformance test generation techniques reported in literature [2,8,48,55,64,72], using a deterministic finite state machine (FSM) model of a protocol specification, focus on the optimization of the test sequence length. However, an IUT may have timing constraints imposed by active timers. If these constraints are not considered during test sequence generation, the sequence ....
....The software implementation of these algorithms developed within ATIRP is described in the next section. 2.5 Related Work Test generation from EFSM models has been an active research area. Sarikaya et al. used the functional program testing approach to generate test sequences from the EFSMs [64]. Software data flow testing approaches have been used to generate tests for the communication protocols [71 73] Ural applied the all uses [73,61] criterion, used for testing software written in block structured programming languages, to Estelle [13,14] specification of protocols. Miller and ....
[Article contains additional citation context not shown here]
B. Sarikaya, G. von Bochmann, and E. Cerny. A test design methodology for protocol testing. IEEE Trans. Softw. Eng., 13(5):518--531, May 1987.
....Laboratory under the Federated Laboratory Program, Cooperative Agreement DAAL0196 2 0002. Dr. Uyar performed this research while a Visiting Associate Professor at University of Delaware. OFF BOTHTIMERS ON TOP UPDATE TIMER ON TOP UPDATE REQ TIMER INACTIVE 25,26,30,32,35] ON 30,32,34,35] T[ 7,8,12,13,15,20, 25,30,32,35] T[ 7,8,10,12,13,14, 15,17,19,20,28,29, 30,32,34,35] T[ 2 6,7,8,25,26,32,35] T[ 9,11,16,18,22,27,33] T[ 9,11,16,18,22,27,29,33] T[23] T[23] T[21] T[24] T[31] T[29] T[31] T[31] T[31] T[1] T[21,29] T[24] Figure 1: Extended FSM for Topology Update module of MIL STD 188 220B. a solution for this ....
....Laboratory Program, Cooperative Agreement DAAL0196 2 0002. Dr. Uyar performed this research while a Visiting Associate Professor at University of Delaware. OFF BOTHTIMERS ON TOP UPDATE TIMER ON TOP UPDATE REQ TIMER INACTIVE 25,26,30,32,35] ON 30,32,34,35] T[ 7,8,12,13,15,20, 25,30,32,35] T[ 7,8,10,12,13,14, 15,17,19,20,28,29, 30,32,34,35] T[ 2 6,7,8,25,26,32,35] T[ 9,11,16,18,22,27,33] T[ 9,11,16,18,22,27,29,33] T[23] T[23] T[21] T[24] T[31] T[29] T[31] T[31] T[31] T[1] T[21,29] T[24] Figure 1: Extended FSM for Topology Update module of MIL STD 188 220B. a solution for this optimization problem is presented in Section 6. Existence ....
[Article contains additional citation context not shown here]
B. Sarikaya, G. v. Bochmann, and E. Cerny, "A test design methodology for protocol testing," IEEE Trans. Softw. Eng., vol. 13, pp. 518-- 531, May 1987.
....conformance to their specifications has become an integral part of the product development cycle. Without the help of formal methods in protocol testing, the interoperability of devices is questionable. Various methods for automated test generation from protocol specifications have been proposed [1, 4, 5, 13, 15, 16, 17, 18, 20, 22], based on a deterministic finite state machine (FSM) model of the specification. Although existing test generation methods concentrate on optimizing the test sequence length, these methods place no restrictions on the order in which the tests can be applied to an implementation under test (IUT) ....
....optimization technique for generating realizable tests must consider the additional restriction that there is a limit on the number of self loop transitions traversed consecutively. OFF BOTHTIMERS ON TOP UPDATE TIMER ON TOP UPDATE REQ TIMER INACTIVE 25,26,30,32,35] ON 30,32,34,35] T[ 7,8,12,13,15,20, 25,30,32,35] T[ 7,8,10,12,13,14, 15,17,19,20,28,29, 30,32,34,35] T[ 2 6,7,8,25,26,32,35] T[ 9,11,16,18,22,27,33] T[ 9,11,16,18,22,27,29,33] T[23] T[23] T[21] T[24] T[31] T[29] T[31] T[31] T[31] T[1] T[21,29] T[24] Figure 1: Extended FSM for Topology Update module of MIL STD 188 220A. In ....
[Article contains additional citation context not shown here]
B. Sarikaya, G. v. Bochmann, and E. Cerny. A test design methodology for protocol testing. IEEE Trans. Softw. Eng., 13(5):518--531, 1987.
....methodology allows us to generate tests free of interruptions due to timeouts, and covering more than 95 of the defined transitions in 188 220B s Type 1 Datalink Layer. 1 INTRODUCTION Testing protocol implementations for conformance to their specifications has been an active research area [16] [14]. In a testing environment, a tester s control over an Implementation Under Test (IUT) may be limited. This problem is likely to make certain protocol features untestable. In an ideal situation, it should be possible to apply to the IUT every possible input that is defined in the protocol ....
B. Sarikaya, G. v. Bochmann, and E. Cerny. A test design methodology for protocol testing. IEEE Trans. Softw. Eng., 13(5):518--531, 1987.
....to over 700. Dr. Uyar performed this research while a Visiting Associate Professor at University of Delaware. 1. Introduction Due to increasing complexity of communication protocols, automated generation of conformance tests based on the formal descriptions has been an active research area [23] [20]. One problem that exists in today s conformance testing stems from the limited controllability of an Implementation Under Test (IUT) which almost always renders certain protocol features unrestable. Ideally, testers should be able to generate every possible input that is defined in the Finite ....
B. Sarikaya, G. v. Bochmann, and E. Cerny. A test design methodology for protocol testing. IEEE Trans. Softw. Eng., 13(5):518-531, May 1987.
....is expanded partially just enough to generate a set of tests that is feasible and practical in size. Determining which features to expand in the general case is the difficult aspect of this research. Test Case Generation Research: Conformance test generation techniques reported in literature [1, 8, 38, 45, 52, 59], using a deterministic finite state machine (FSM) model of a protocol specification, focus on the optimization of the test sequence length. However, an IUT may have timing constraints imposed by active timers. If these constraints are not considered during test sequence generation, the sequence ....
....As seen from Table 3, the tests already delivered to CECOM contain approximately 10,000 test steps. It is clear that manually generating test sets of this size from the protocol textual description is not a trivial task. A number of conformance test generation techniques have been proposed [1, 8, 10, 45, 52, 56, 59], each of which is expected to give better results for a certain class of protocol specifications depending on the nature and size of the protocol. The experience obtained in generating tests for 188 220 suggests that to successfully test today s complex protocols by using formal methods, 18 an ....
B. Sarikaya, G. v. Bochmann, and E. Cerny. A test design methodology for protocol testing. IEEE Trans. Softw. Eng., 13(5):518--531, 1987.
.... Update (TU) is shown in Figure 1 [10] The equivalent FSM model of OFF BOTHTIMERS ON TOP UPDATE TIMER ON TOP UPDATE REQ TIMER INACTIVE 25,26,30,32,35] ON 30,32,34,35] T[ 7,8,12,13,15,20, 25,30,32,35] T[ 7,8,10,12,13,14, 15,17,19,20,28,29, 30,32,34,35] T[ 2 6,7,8,25,26,32,35] T[ 9,11,16,18,22,27,33] T[ 9,11,16,18,22,27,29,33] T[23] T[23] T[21] T[24] T[31] T[29] T[31] T[31] T[31] T[1] T[21,29] T[24] Figure 1: Extended FSM for Topology Update module of MILSTD 188 220B. Topology Update has 10 states and 345 state transitions. In 8 of these states at least one timer is running in ....
.... Figure 1 [10] The equivalent FSM model of OFF BOTHTIMERS ON TOP UPDATE TIMER ON TOP UPDATE REQ TIMER INACTIVE 25,26,30,32,35] ON 30,32,34,35] T[ 7,8,12,13,15,20, 25,30,32,35] T[ 7,8,10,12,13,14, 15,17,19,20,28,29, 30,32,34,35] T[ 2 6,7,8,25,26,32,35] T[ 9,11,16,18,22,27,33] T[ 9,11,16,18,22,27,29,33] T[23] T[23] T[21] T[24] T[31] T[29] T[31] T[31] T[31] T[1] T[21,29] T[24] Figure 1: Extended FSM for Topology Update module of MILSTD 188 220B. Topology Update has 10 states and 345 state transitions. In 8 of these states at least one timer is running in the implementation. A ....
B. Sarikaya, G. v. Bochmann, and E. Cerny. A test design methodology for protocol testing. IEEE Trans. Softw. Eng., 13(5):518--531, 1987.
....other are forbidden in the system. Typically, the more complex interprocess communication patterns, the stronger is the ordering of various configurations along the paths of interest. This leads to the sort of serialized view of parallelism, providing a basis for a number of testing approaches [9,10,11]. Executing parallel program paths has some additional problems not present in sequential programs. For a sequential program path that is executable there is a set of data that force the program predicates along a selected path to the values that guarantee this path execution. Once the set is ....
Sarikaya, B., Bochmann, G., Cerny E.: A test design methodology for protocol testing. IEEE Trans. Software Eng., SE-13, 518-531 (1987)
....state [13] We have eliminated the problem of state explosion by utilizing the concept of sum machines and by encapsulating interprocess communication in objects that model communications events. Techniques that can be applied to these objects deal with test case design for parallel programs [18] and their reproducible execution [20] ffl Object oriented analysis and modeling . Information extracted from a rich and complex parallel system code is transformed within the model into well defined objects, attributes and relationships in order to assess quality, verify and possibly modify the ....
Sarikaya, B., Bochmann, G., Cerny E.: A test design methodology for protocol testing. IEEE Trans. Software Eng., SE-13, 518-531 (1987).
....sequences for testing the control flow aspects. These methods abstract the control dependencies in the EFSM representation of a process as an FSM and apply FSM based test generation methods [Dah90, Sid89] Other methods focus on the construction of test sequences for testing the data flow aspects [Sar87, Chun90, Ural91, Hen95, Ural00]. These methods identify the data dependencies in the EFSM representation of a process by applying principles of functional program testing [How87] or data flow analysis [Fos76] Since these methods consider only a single EFSM and a limited SDL syntax for the EFSM representation, their ....
B. Sarikaya, G.v. Bochmann, and E. Cerny, "A test design methodology for protocol testing ", IEEE Trans. Software Eng., vol. SE-13, no. 5, 1987, pp. 518--531.
....and combinatorial explosion of possible interactions between parallel processes. The former poses a problem for effective selection of test cases for sequential programs and has been investigated before [2] By using specific modeling techniques of concurrent systems using Finite State Machines [26] or directed graphs [30] it is possible to apply path coverage techniques for sequential programs to parallel programs. Arbitrary ordering of parallel program statements leads to an excessive volume of paths being considered for tests. However, modular programming paradigms supported by modern ....
Sarikaya, B., Bochmann, G., Cerny, E.: A test design methodology for protocol testing. IEEE Trans. Software Eng. SE-13, 518-531 (1987)
....methodology allows us to generate tests free of interruptions due to timeouts, and covering more than 95 of the defined transitions in 188 220B s Type 1 Datalink Layer. 1 Introduction Testing protocol implementations for conformance to their specifications has been an active research area [1] [10]. In a testing environment, a tester s control over an Implementation Under Test (IUT) may be limited. This problem is likely to make certain protocol features untestable. In an ideal situation, it should be possible to apply to the IUT every possible input that is defined in the protocol ....
B. Sarikaya, G. von Bochmann, and E. Cerny, "A test design methodology for protocol testing," IEEE Trans. on Software Engineering, vol. 13, pp. 518--531, May 1987.
....is expanded partially just enough to generate a set of tests that is feasible and practical in size. Determining which features to expand in the general case is the difficult aspect of this research. Test Case Generation Research: Conformance test generation techniques reported in the literature [1,7,39,46,55,62], using a deterministic finite state machine (FSM) model of a protocol specification, focus on the optimization of the test sequence length. However, an IUT may have timing constraints imposed by active timers. If these constraints are not considered during test sequence generation, the sequence ....
....part of synergistic efforts to develop C 4 I systems. to CECOM contain approximately 10,000 test steps. It is clear that manually generating test sets of this size from the protocol textual description is not a trivial task. A number of conformance test generation techniques have been proposed [1,7,9,46,53,55,59,62], each of which is expected to give better results for a certain class of protocol specifications depending on the nature and size of the protocol. The experience obtained in generating tests for 188 220 suggests that to successfully test today s complex protocols by using formal methods, an ideal ....
B. Sarikaya, G. von Bochmann, E. Cerny, A test design methodology for protocol testing, IEEE Trans. Software Engng 13 (5) (1987) 518-- 531.
....is expanded partially just enough to generate a set of tests that is feasible and practical in size. Determining which features to expand in the general case is the difficult aspect of this research. Test Case Generation Research: Conformance test generation techniques reported in literature [1,8,38,45,53,60], using a deterministic finite state machine (FSM) model of a protocol specification, focus on the optimization of the test sequence length. However, an IUT may have timing constraints imposed by active timers. If these constraints are not considered during test sequence generation, the sequence ....
....As seen from Table 3, the tests already delivered to CECOM contain approximately 10,000 test steps. It is clear that manually generating test sets of this size from the protocol textual description is not a trivial task. A number of conformance test generation techniques have been proposed [1,8,10,45,51,53,57,60], each of which is expected to give better results for a certain class of protocol specifications depending on the nature and size of the protocol. The experience obtained in generating tests for 188 220 suggests that to successfully test today s complex protocols by using formal methods, an ideal ....
B. Sarikaya, G. v. Bochmann, and E. Cerny. A test design methodology for protocol testing. IEEE Trans. Softw. Eng., 13(5):518--531, May 1987.
....state, and thereby disrupting the test sequence before all of the self loops are traversed. If these timers are not taken into consideration during the test generation, most tests will result in either an 2 BOTHTIMERS OFF BOTHTIMERS ON TOP UPDATE TIMER ON TOP UPDATE REQ TIMER INACTIVE T[ 7,8,12,13,15,20, 25,26,30,32,35] ON T[ 15,17,19,20,26,28, 30,32,34,35] T[ 7,8,12,13,15,20, 25,30,32,35] T[ 7,8,10,12,13,14, 15,17,19,20,28,29, 30,32,34,35] T[ 2 6,7,8,25,26,32,35] T[ 9,11,16,18,22,27,33] T[ 9,11,16,18,22,27,29,33] T[23] T[23] T[21] T[24] T[31] T[29] T[31] T[31] T[31] T[1] T[21,29] T[24] Fig. 1. Extended FSM for ....
....are traversed. If these timers are not taken into consideration during the test generation, most tests will result in either an 2 BOTHTIMERS OFF BOTHTIMERS ON TOP UPDATE TIMER ON TOP UPDATE REQ TIMER INACTIVE T[ 7,8,12,13,15,20, 25,26,30,32,35] ON T[ 15,17,19,20,26,28, 30,32,34,35] T[ 7,8,12,13,15,20, 25,30,32,35] T[ 7,8,10,12,13,14, 15,17,19,20,28,29, 30,32,34,35] T[ 2 6,7,8,25,26,32,35] T[ 9,11,16,18,22,27,33] T[ 9,11,16,18,22,27,29,33] T[23] T[23] T[21] T[24] T[31] T[29] T[31] T[31] T[31] T[1] T[21,29] T[24] Fig. 1. Extended FSM for Topology Update module of MIL STD 188 220B. inconclusive verdict or, ....
[Article contains additional citation context not shown here]
B. Sarikaya, G. von Bochmann, and E. Cerny, "A test design methodology for protocol testing," IEEE Trans. Softw. Eng., vol. 13, pp. 518--531, May 1987.
....methodology allows us to generate tests free of interruptions due to timeouts, and covering more than 95 of the defined transitions in 188 220B s Type 1 Datalink Layer. 1 Introduction Testing protocol implementations for conformance to their specifications has been an active research area [1] [10]. In a testing environment, a tester s control over an Implementation Under Test (IUT) may be limited. This problem is likely to make certain protocol features untestable. In an ideal situation, it should be possible to apply to the IUT every possible input that is defined in the protocol ....
B. Sarikaya, G. von Bochmann, and E. Cerny, "A test design methodology for protocol testing," IEEE Trans. on Software Engineering, vol. 13, pp. 518--531, May 1987.
....methodology allows us to generate tests free of interruptions due to timeouts, and covering more than 95 of the defined transitions in 188 220B s Type 1 Datalink Layer. 1 Introduction Testing protocol implementations for conformance to their specifications has been an active research area [1] [10]. In a testing environment, a tester s control over an Implementation Under Test (IUT) may be limited. This problem is likely to make certain protocol features untestable. In an ideal situation, it should be possible to apply to the IUT every possible input that is defined in the protocol ....
B. Sarikaya, G. von Bochmann, and E. Cerny, "A test design methodology for protocol testing," IEEE Trans. on Software Engineering, vol. 13, pp. 518--531, May 1987.
....Dr. Uyar performed this research while a Visiting Associate Professor at University of Delaware. 1 INTRODUCTION Due to increasing complexity of communication protocols, automated generation of conformance tests based on the formal descriptions has been an active research area [Ural, 1992] [Sarikaya et al. 1987]. One problem that exists in today s conformance testing stems from the limited controllability of an Implementation Under Test (IUT) which almost always renders certain protocol features untestable. Ideally, testers should be able to generate every possible input that is defined in the Finite ....
Sarikaya, B., von Bochmann, G., and Cerny, E. (1987). A test design methodology for protocol testing. IEEE Trans. Software Engineering, 13(5):518--531.
....In deriving a transition sequence from a transition diagram, we can take advantage of its similarity to the FSM, and adapt some ideas of FSM s test sequence generation. A transition sequence is, however, not only a sequence of input output pairs as is the case for a test sequence for an FSM. In [16], a test sequence was derived reflecting the functional behavior of a protocol module. This test sequence consists of a sequence of transitions of the transition diagram. 10] pointed out such a test sequence may not be executable. In [10] def ob paths and conditional paths are generated from the ....
B. Sarikaya, G. V. Bochmann and E. Cerny, "A Test Design Methodology for Protocol Testing," IEEE Transactions on Software Engineering, vol. SE-13, no. 5, pp. 518-539, May 1987.
.... to the original self loops of a specification model, additional self loops are typically created when generated test sequences use state verification techniques such as unique input output (UIO) sequences [13] BOTHTIMERS OFF BOTHTIMERS ON TOP UPDATE TIMER ON TOP UPDATE REQ TIMER INACTIVE T[ 7,8,12,13,15,20, 25,26,30,32,35] ON T[ 15,17,19,20,26,28, 30,32,34,35] T[ 7,8,12,13,15,20, 25,30,32,35] T[ 7,8,10,12,13,14, 15,17,19,20,28,29, 30,32,34,35] T[ 2 6,7,8,25,26,32,35] T[ 9,11,16,18,22,27,33] T[ 9,11,16,18,22,27,29,33] T[23] T[23] T[21] T[24] T[31] T[29] T[31] T[31] T[31] T[1] T[21,29] T[24] Figure 1: Extended FSM ....
.... are typically created when generated test sequences use state verification techniques such as unique input output (UIO) sequences [13] BOTHTIMERS OFF BOTHTIMERS ON TOP UPDATE TIMER ON TOP UPDATE REQ TIMER INACTIVE T[ 7,8,12,13,15,20, 25,26,30,32,35] ON T[ 15,17,19,20,26,28, 30,32,34,35] T[ 7,8,12,13,15,20, 25,30,32,35] T[ 7,8,10,12,13,14, 15,17,19,20,28,29, 30,32,34,35] T[ 2 6,7,8,25,26,32,35] T[ 9,11,16,18,22,27,33] T[ 9,11,16,18,22,27,29,33] T[23] T[23] T[21] T[24] T[31] T[29] T[31] T[31] T[31] T[1] T[21,29] T[24] Figure 1: Extended FSM for Topology Update module of MIL STD 188 220B. distinguishing sequences ....
[Article contains additional citation context not shown here]
B. Sarikaya, G. von Bochmann, and E. Cerny, "A test design methodology for protocol testing," IEEE Trans. Software Engineering, vol. 13, pp. 518--531, May 1987.
....conformance to their specifications has become an integral part of the product development cycle. Without the help of formal methods in protocol testing, the interoperability of devices is questionable. Various methods for automated test generation from protocol specifications have been proposed [1, 2, 3, 4, 5, 6, 7, 8, 9, 10], based on a deterministic finite state machine (FSM) model of the specification. Although existing test generation methods concentrate on optimizing the test sequence length, these methods place no restrictions on the order in which the tests can be applied to an implementation under test (IUT) ....
....transitions separately. BOTHTIMERS OFF BOTHTIMERS ON TOP UPDATE TIMER ON TOP UPDATE REQ TIMER INACTIVE T[ 7,8,12,13,15,20, 25,26,30,32,35] ON T[ 15,17,19,20,26,28, 30,32,34,35] T[ 7,8,12,13,15,20, 25,30,32,35] T[ 7,8,10,12,13,14, 15,17,19,20,28,29, 30,32,34,35] T[ 2 6,7,8,25,26,32,35] T[ 9,11,16,18,22,27,33] T[ 9,11,16,18,22,27,29,33] T[23] T[23] T[21] T[24] T[31] T[29] T[31] T[31] T[31] T[1] T[21,29] T[24] Figure 1: Extended FSM for Topology Update module of MIL STD 188 220A. 2 Motivation During testing, to realize a state transition takes a certain amount of time. A test sequence that traverses ....
[Article contains additional citation context not shown here]
B. Sarikaya, G. Bochmann, and E. Cerny, "A test design methodology for protocol testing," IEEE Trans. Software Engineering, vol. 13, pp. 518--531, May 1987.
....may be infinite in number. In theory, a proper trace analyzer must attempt all possible execution paths to search the entire state space, but because the state space is infinite, supporting loops is impractical. Applying a straightforward transformation of the specification into a normal form [16] which eliminates case and if then else statements by adding states and transitions to the specification, will simplify the problem of partial trace file analysis, and allow Tango to analyze partial traces of specifications which do use these constructs. Fortunately, most Estelle specifications ....
B. Sarikaya, G.v. Bochmann, and E. Cerny. "A test design methodology for protocol testing". IEEE Transactions on Software Engineering, 13, 1987.
....Page 2 1. INTRODUCTION The testing phase represents a large effort within the common software development cycle. In the area of communication software, systematic approaches have been developed for protocol conformance testing [Rayn87, Boch89] and the selection of appropriate test suites [Fuji91, Pitt90, Sidh89, Sari87, Sari84, Chow78]. These approaches can produce significant economic benefits [Aho90, AT T90] Usually, the specifications of communication software are first abstracted to state machines, then test cases are generated from the resulting machines [Lee91, Roug89] A considerable amount of work has been done to ....
B. Sarikaya, G.v. Bochmann, and E. Cerny, "A Test Design Methodology for Protocol Testing", IEEE Transactions on Software Engineering, Vol.13, No.9, Sept.. 1987, pp.989-999.
No context found.
B. Sarikaya, G. von Bochmann, and E. Cerny, "A test design methodology for protocol testing," IEEE Trans. Software Engineering, vol. 13, pp. 518--531, May 1987.
No context found.
B. Sarikaya, G. Bochmann, E. Cerny. "A Test Design Methodology for Protocol Testing," in IEEE Trans. on Software Engineering, vol. SE-13, no. 5, May 1987.
No context found.
B. Sarikaya, G. v. Bochmann, and E. Cerny, "A test design methodology for protocol testing," IEEE Trans. on Soft. Eng., vol. SE-13, no. 5, pp. 518-531, 1987.
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