Erika Cota, Luigi Carro, Fl avio Wagner, Marcelo Lubaszewski, "Power Aware NoC reuse on the testing of core based systems", International Test Conference ITC 2003. Home/Search Document Details and Download
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BISTed cores and Test Time Minimization in NOC-based.. - Cota, Carro, Wagner.. Self-citation (Cota Carro Wagner Lubaszewski) (Correct)
....tasks. Each task (packet) can use only one resource (path) A basic list scheduling algorithm was implemented, resulting in a very effective test method for such systems, with reduced test times with no pins and area overhead. Power consumption during test is modelled for the NoCbased TAM in [8]. Four sources of power consumption during test are considered: the core, the wrapper, the router, and the communication channel. The power consumption of each core during test is provided by the core provider, as well as the wrapper consumption for one packet processing. The total power ....
E. Cota, L. Carro, F. Wagner, and M. Lubaszewski. PowerAware NoC Reuse on the Testing of Core-based Systems. In To appear in European Test Workshop, May 2002.
Considerations for fault-tolerant Network on Chips - Muhammad Ali Michael (2005) (Correct)
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Erika Cota, Luigi Carro, Fl avio Wagner, Marcelo Lubaszewski, "Power Aware NoC reuse on the testing of core based systems", International Test Conference ITC 2003.
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