Thinking Machines Corporation, Connection Machine Model CM-2 Technical Summary,Version 5.1, May 1989.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....data through a single simple processor. This bottleneck has been addressed in various ways. MPP uses a staging memory in which image data can be placed and distributed to the array along one dimension. The I O bottleneck has been addressed by a new version of the Connection Machine, called CM 2 [31]. In this computer, a number of disk drives can feed data into various points in the array simultaneously. The CM 1 benchmark figures do not include image I O: the processing is done on an image which has already been loaded into the array, and processing is completed with the image still in the ....

Thinking Machines Corporation. Connection Machine Model CM-2 Technical Summary. HA 87-4, Thinking Machines Corporation, April, 1897.

....very high. It can be extended to support multiple failure toleration by using an n failure tolerating Hamming code, which of course increases the capacity overhead for redundancy and the computational overhead for computing the codes. Thinking Machines Corporation s Data Vault storage subsystem [TMC87] employed RAID Level 2, but this organization ignores an important fact about failure modes in disk drives. Since disks contain extensive error detection and correction functionality, and since they communicate with the outside world via complex protocols, the array controller can directly ....

Thinking Machines Corporation, Connection Machine Model CM-2 Technical Summary, Thinking Machines Technical Report HA87-4, 1987.

....[48] The distinction arises from the control mechanism employed. In SIMD architectures a single control unit issues instructions to each of the PEs. Thus the same instruction is executed synchronously by all processing units. An example of this style of architecture is the Thinking Machine CM 2 [133]. In contrast, each PE in a MIMD machine is capable of executing a different program independently of the other PEs. Address space organisation The most important distinction between MIMD machines is the programming model used. Message passing and shared memory provide two different models of PE ....

Thinking Machines Corporation. Connection Machine Model CM-2 Technical Summary, 1989. References 303

....of the machine from the programmer. This kind of higher level languages can be implemented over POMPC. Most of the SIMD machines provide this kind of basic language and a taxonomy of many SIMD languages and machines can be found in [Tuc90] POMPC has been inspired by the previous version of C [Thi87, pages 35 41] and is rather similar to the new version of this language. MPL [Chr90] and MultiC [Wav90] are also alike (without the collection mechanism) To implement this model, we must define at any time what the different processors (the scalar one and the different virtual SIMD machines) ....

....[Bla90a] which is a good compromise. ffl the hardware required to correctly recover from an exception or an interruption. 4. 4 The controller and the scalar processor Some SIMD machines use an independent sequencer to run scalar code or to expand microinstructions generated by an host computer [Thi87] The use of the host computer as scalar processor facilitates the software development but requires high input output bandwidth for the broadcast of the code from the host to the PEs. It is possible only if an intermediate sequencer expands some high level instructions into microcode (typically ....

[Article contains additional citation context not shown here]

Thinking Machine Corporation. Connection Machine Model CM-2 Technical Summary, Avril 1987. HA87-4.

....He does not address stability conditions or the effect of variations on the number of processors per node. He assumes a hypercube of dimension 12 connecting 4096 nodes with 16 processors per node. These dimensions and the TDM communication scheme are used in the Con2 nection Machine 2(CM 2) 1 [5, 6]. However, like Gelenbe and unlike the CM 2, we are considering a machine that is executing in a MIMD manner. There are many relevant studies of packet delays in one level multicomputer networks. Protopapas and Denenberg [7] present a queueing network model for an arbitrary point to point ....

Thinking Machines Corporation, Cambridge, MA, Connection Machine Model CM-2 Technical Summary, April 1987. Technical Machines Technical Report HA 87-4.

....and the higher data rates mandated by new applications is to use several disks in parallel. Much like memory interleaving, faster secondary storage systems can be built from a collection of slower storage devices. Several concurrent I O architectures, such as Imprimis ArrayMaster [1] DataVault [2], CFS [3] and Raid [4, 5] are based on this observation. Swift uses this approach to achieve any required data rate to secondary storage up to saturation of the interconnection medium. Figure 1 has a diagram of the architectural structure of Swift. The Swift architecture distinguishes four ....

Thinking Machines, Incorporated, Connection Machine Model CM-2 Technical Summary, May 1989.

....many (slow) storage devices into a faster logical storage service, making all applications unaware of this aggregation. In Swift, sets of storage servers work concurrently to satisfy the requests made by clients. Several concurrent I O architectures, such as Imprimis ArrayMaster [4] DataVault [5], CFS [6] RADD [7] and RAID [3, 8] are based on this observation. Mainframes [9, 10] and super computers [11] have also exploited this approach. Swift is a client server system made up of independently replaceable components. Clients are connected to sets of storage servers through an ....

....swapping performance [2] To our knowledge, Swift is the first to use disk striping in a distributed environment, striping files over multiple servers in a local area network. Examples of some commercial systems that utilize disk striping include super computers [11] DataVault for the CM 2 [5], the airline reservation system TPF [9] the IBM AS 400 [10] CFS from Intel [6] and the Imprimis ArrayMaster [4] Hewlett Packard is developing a system called DataMesh that uses an array of storage processors connected by a high speed switched network [4] For all of these the maximum data ....

Thinking Machines, Incorporated, Connection Machine Model CM-2 Technical Summary, May 1989.

....and driving them in parallel. The principle behind our architecture is simple: aggregate arbitrarily many (slow) storage devices into a faster logical service, making all applications unaware of this aggregation. Several concurrent I O architectures, such as Imprimis ArrayMaster [4] DataVault [5], CFS [6, 7] and Raid [3, 8] are based on this observation. Mainframes [9, 10] and super computers [11] have also exploited this approach. 1 Unix is a trademark of AT T Bell Laboratories 2 Distribution Agent . Storage Agents Storage Mediator Client Interconnection Medium Figure ....

....as a means of improving swapping performance [2] To our knowledge, Swift is the first to use disk striping in a distributed environment, striping files over multiple servers. Examples of some commercial systems that utilize disk striping include super computers [11] DataVault for the CM 2 [5], the airline reservation system TPF [9] the IBM AS 400 [10] CFS from Intel [6, 7] and the Imprimis ArrayMaster [4] Hewlett Packard is developing a system called DataMesh that uses an array of storage processors connected by a highspeed switched network [19] For all of these the maximum ....

Thinking Machines, Incorporated, Connection Machine Model CM-2 Technical Summary, May 1989.

....historically most work on parallelizing dusty deck code has been vectorization. 8. 5 Stencil computations The Connection Machine Convolution Compiler [22] addresses the same problem domain as this paper: its techniques are designed to optimize the performance of stencil computations on the CM2 [132]. Most of its optimizations, such as strip mining, software pipelining, and loop unrolling, are well known; the others are specific to, or mandated by, details of the architecture (floating point and vector unit timing, vector sizes, and so forth) Its schemes for register reuse in multistencil ....

Thinking Machines Corporation. Connection Machine Model CM-2 technical summary. Technical Report HA87-4, Cambridge, Massachusetts, April 1987.

....neighbor network is often the same as the PE datapath width, although it may be substantially smaller. General Communication Many SIMD arrays have additional interPE communication networks. These have included the CM 2 packet switched network, which supports broadcast, reduction, and scans [34]; the MasPar circuit switched network [2] and various networks based on broadcast buses [8, 20, 25, 29, 39] Nearly all of these networks have the property that the communication takes from a few to a few thousand PE instruction cycles during which time the PEs are idle. Feedback from Array to ....

Thinking Machines Corporation. Connection Machine model: CM-2 technical summary. Tech. Rep. T.R. HA87-4, Thinking Machines Corporation, Cambridge, MA, 1987.

....are more cost effective since they don t need all the hardware infrastructure associated with allowing multiple processor to access the same memory unit and therefore provide more raw processing power for a lower price at the expense of the system s programming model s friendliness. The CM 5 [TMC90b] by the Thinking Machine Corporation is a MIMD machine, which contrasts with the earlier SIMD CM 1 and CM 2, a further sign of the general tendency of vendors to concentrate on MIMD architectures. The CM 5 is a private memory NORMA machine with a special type of processor interconnection called a ....

Thinking Machines Corporation, Connection Machine Model CM-5 Technical Summary, 1990.

....limited applicability and to the fact that they are virtually impossible to upgrade, thereby representing a once in a lifetime investment for many companies or institutions that buy one. IV. Parallel Operating Systems 171 An example of a SIMD machine is the Connection Machine (e.g. CM 2) [TMC90a], built by the Thinking Machines Corporation. It has up to 64k processing elements where each of them operates on a single bit and is only able to perform very simple logical and mathematical operations. For each set of 32 processing cells there are four memory chips, a numerical processor for ....

Thinking Machines Corporation, Connection Machine Model CM-2 Technical Summary, 1990.

....very high. It can be extended to support multiple failure toleration by using an n failure tolerating Hamming code, which of course increases the capacity overhead for redundancy and the computational overhead for computing the codes. Thinking Machines Corporation s Data Vault storage subsystem [TMC87] employed RAID Level 2, but this organization ignores an important fact about failure modes in disk drives. Since disks contain extensive error detection and correction functionality, and since they communicate with the outside world via complex protocols, the array controller can directly ....

Thinking Machines Corporation, Connection Machine Model CM-2 Technical Summary, Thinking Machines Technical Report HA87-4, 1987. 199

....cost, and programmability. Special purpose architectures such as the Pixar [LEVI84] DREB88] KaufmanCube [KAUF88] LMO 2 [MEAG91] PARCUM, Voxel Processor, SCOPE, and 3DP 4 [OHAS85] KAUF90] achieve only limited improvements over general supercomputers such as the Connection Machine [SCHR90][THIN89], MasPar MP 1 [BLAN90] and MP 2. Also, the adaptability of special purpose architectures to different algorithms, data 3 sets, and modelling is limited. For example, the Kaufman Cube [KAUF88] achieves update rates of 16 35 frames second but uses binary voxel classification, an algorithm simpler ....

....operation. This broadcast is efficiently built into the MasPar [BLAN90] and the CM 2 I 1 I 2 scaled up p a p b p c p d p e p f p a p b p c p d p e p f I 1 I 2 I 3 I 1 I 2 get al..l data do all jobs local to data Time get some interpolate send some and send 59 [THIN89]. The spread occurs in an aligned dimension of the multidimensional mesh of the MCCM. FIGURE 38 Spreading To Distribute Data Job assignment is done efficiently on algorithms on machines with fewer physical processors than virtual processors. MCCM SIMD takes advantage of the coherence of each ....

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Thinking Machines Corp., Connection Machine Model CM-2 Technical Summary, Version 5.1. Cambridge, MA: Thinking Machines Corp., 1989.

....DLTA = 0.7000 0.7 2.7 6.0 9.3 0.5 0.5 1.5 Min= 2.72 , Max=2.88 , Delta=0.7 Figure 15 4 2 0 2 4 2 4 6 8 10 RES 1E 03 RES 1E 04 Figure 16 4 Parallel implementation on the Connection Machine 4. 1 Presentation of the CM2 200 We first recall the main features of the Connection machine CM2 [26] before describing the parallel algorithm. The CM2 is a SIMD (Single Instruction Multiple Data) distributed memory machine containing up to 64K (K=1024) bit serial processors having their own memory. These processors are arranged 16 to a chip in a hypercube topology (of dimension 12 for the 64K ....

Thinking Machine Corporation, Connection machine model CM-2: Technical summary, version 6.0 (1990)

....able to deal with non uniform communication patterns. We should be able to take advantage of the density and proximity of the communication patterns. Packets are generally small and of uniform size On SIMD processors communication is a synchronous instruction (such as the Connection Machine SEND [35]) where the arguments are two arrays mapped to the PE grid: the destination address, and the data. The data is usually a single word, for example a spectral value or a count. When vectors of data need to be transmitted, this usually requires multiple SENDs. In section 8 we present two algorithms ....

Thinking Machines Corporation. Connection Machine Model CM-2 Technical Summary. Thinking Machines T.R. HA87-4, 1987.

....to mid 1980. Actually, a data parallel language has been around since mid 1960, namely APL [Iverson, 1962, McDonnel, 1979] The new thrust in research in data parallel languages started with the introduction of vector processors, like the CRAY, and large SIMD computers, like the Connection Machine [TMC, 1989]. Often data parallel programming paradigms have been introduced to make the compilation or vectorization process easier. In FORTRAN, for instance, it is usually much easier to vectorize a direct operation on arrays than a complicated loop statement. Some algorithms are also easy to express in ....

TMC, Thinking Machines Corporation, 245 First Street, Cambridge, Massachusetts 02142, (1989). Connection Machine Model CM-2 Technical Summary, 1989.

....datapath width, the number of functions supported, the number of address decodes per instruction, and the availability and level of floating point support. The latter can consist of a commercial floating point coprocessor, perhaps shared among some number of PEs as in the Thinking Machines CM 2 [137]. Alternatively, each PE can have its own support, somewhat short of a complete floating point coprocessor, such as the barrel shifter in the PEs of the MasPar MP1 and MP2 [103] 3.2.2 Memory Hierarchy Design MPA memory hierarchy designs have also been very simple. Currently, there are two ....

....buffered at each intermediate node between the source and the destination. Therefore, only the next node need be open for the packet to make progress; if the packet is blocked it remains where it is until the next node is ready to accept it. For example, the CM 2 has such a communication network [137]. It is also worth noting that any processor with support for nearest neighbor communication can simulate such a network [70] ffl Circuit Switched Networks Circuit switched communication differs from packet switched in that the entire path between source and destination must be clear before the ....

[Article contains additional citation context not shown here]

Thinking Machines Corporation. Connection Machine model: CM-2 technical summary. Tech. Rep. T.R. HA87-4, Thinking Machines Corporation, Cambridge, MA, 1987.

....our architecture is simple: use a high speed interconnection medium to aggregate arbitrarily many (slow) storage devices into a faster logical storage service, making all applications unaware of this aggregation. Several concurrent I O architectures, such as Imprimis ArrayMaster [4] DataVault [5], CFS [6,7] RADD [8] and RAID [3,9] are based on this observation. Mainframes [10,11] and super computers [12] have also exploited this approach. Swift is a client server distributed architecture made up of independently replaceable components. The advantage of this modular approach is that any ....

....system as a means of improving swapping performance [2] To our knowledge, Swift is the first to use disk striping in a distributed environment, striping files over multiple servers. Examples of some commercial systems that utilize disk striping include super computers [12] DataVault for the CM 2 [5], the airline reservation system TPF [10] the IBM AS 400 [11] CFS from Intel [6,7] and the Imprimis ArrayMaster [4] Hewlett Packard is developing a system called DataMesh that uses an array of storage processors connected by a high speed network [23] For all of these the maximum data rate is ....

Thinking Machines, Incorporated, Connection Machine Model CM-2 Technical Summary, May 1989.

....of the machine from the programmer. This kind of higher level languages can be implemented over POMPC. Most of the SIMD machines provide this kind of basic language and a taxonomy of many SIMD languages and machines can be found in [Tuc90] POMPC has been inspired by the previous version of C [Thi87, pages 35 41] and is rather similar to the new version of this language. MPL [Chr90] and MultiC [Wav90] are also alike (without the collection mechanism) To implement this model, we must define at any time what the different processors (the scalar one and the different virtual SIMD machines) ....

....[Bla90a] which is a good compromise. ffl the hardware required to correctly recover from an exception or an interruption. 4. 4 The controller and the scalar processor Some SIMD machines use an independent sequencer to run scalar code or to expand microinstructions generated by an host computer [Thi87] The use of the host computer as scalar processor facilitates the software development but requires high input output bandwidth for the broadcast of the code from the host to the PEs. It is possible only if an intermediate sequencer expands some high level instructions into microcode (typically ....

[Article contains additional citation context not shown here]

Thinking Machine Corporation. Connection Machine Model CM-2 Technical Summary, Avril 1987. HA87-4.

....N O D E S . Stage 1 Stage 2 Stage 3 Stage 4 . N O D E S . Figure 1.1: A Butterfly Network using 2x2 Switches. An important feature of this topology is that any size network can be made out of the same switches. For networks such as the hypercube (which is used in the Connection Machine [15] and the Cosmic Cube [12] the number of connections to a switching node is a function of the number of nodes in a network. Since the number of nodes in Monsoon will vary greatly, it is useful to have a switching node whose complexity will not increase as the size of the machine increases. ....

Thinking Machines Corporation. Connection Machine Model CM-2 Technical Summary. Thinking Machines Technical Report HA87-4, Cambridge, MA, April 1987.

....values at every pixel, so must exist in pixel memory. They are fast and efficient because their storage and operations are replicated across the SIMD array. This same distinction between shared (uniform) and SIMD array (varying) memory was made by Thinking Machines for the Connection Machine [ThinkingMachines89], though they called them mono and poly, and by MasPar for the MP 1 [MasPar90] though their terms were singular and plural. 6.1.3 Fixed point We can achieve significant speed improvements by using fixedpoint operations for varying computations instead of floatingpoint. Our pixel processors do ....

Thinking Machines Corporation, Connection Machine Model CM-2 Technical Summary. Thinking Machines Corporation, Version 5.1, May 1989.

....is currently implemented in our model. 11. A template program for Fortran P muscl16 is available via anonymous ftp from ftp.arc.umn.edu in the pub directory. This program shows how boundary handling can be written properly in Fortran P. 12. For example, the CM 200 [TMC89], which has four megabytes of memory per node and relatively slow network speed, would perform better with more fake zones than the Maspar MP 1 [Bla90] which has only 64 Kbytes of memory per node but a relatively fast network. June 24, MPP 11 Fortran P We note that some popular algorithms ....

....execution. Data layout directives [CMF91] are generated that partition the data domain equally among the processors. Integer arrays, floating point scalars and floating point arrays are promoted in dimension and laid out across the processors; integer scalars are placed on the front end (CM 200 [TMC89], MasPar MP 1 [Bla90] Current Fortran P codes use integer scalars almost exclusively for index calculations and these scalars are stored on the front end. The arrays are promoted in dimension to map onto either a 2 D or 3 D processor grid, as specified by the programmer (generally, 2 D and 3 D ....

[Article contains additional citation context not shown here]

Thinking Machines Corp., Connection Machine Model CM-2 Technical Summary, TMC Technical Report TR89-1.

.... PEs that need to execute different operations cannot do useful work in that cycle. Because CSI increases the fraction of PEs that simultaneously execute the same instruction (the useful parallelism width) large speedups can be obtained. Examples of this type of machine include the TMC CM 2 [16] and the MasPar MP 1 [3] # Vector: Although typically not as parallel, vector machines profit from CSI in essentially the same way that SIMD machines do. A good example of such a machine is the Cray Y MP C90 [5] # MIMD with shared I Cache: CSI, as described in this paper, is directly usable to ....

Thinking Machines Corporation, Connection Machine Model CM-2 Technical Summary," version 6.0, Cambridge, Massachusetts, November 1990.

....and decompress operations on subdomain data can effectively be performed on each local node. Although operations on the compressed data might in principle proceed faster if this work load were rebalanced, no such dynamic load balancing is now envisioned for Fortran P. 6 For example, the CM 200 [19], which has four megabytes of memory per node and relatively slow network speed, would perform better with more fake zones than the Maspar MP 1 [1] which has only 64 Kbytes of memory per node but a relatively fast network. 7 4. The Fortran P Translator In this section we describe the current ....

Thinking Machines Corp., Connection Machine Model CM-2 Technical Summary, TMC Technical Report TR89-1.

....files has been proposed in [8] so that the file system is run on multiple processors. A simpler mechanism, namely the interleaving of data bits across multiple processors, can be used for fine grain SIMD machines. This mechanism is implemented in the Data Vault of the Connection Machine 2 [24], where each word can be written or read in parallel. For any of the schemes for data storage and access outlined above, an immediate question that arises is how many I O nodes should be used, and where should they be located. How should these choices depend on the number of computing nodes used ....

Thinking Machines. Connection machine model CM-2 technical summary. Technical Report HA87-4, Thinking Machines, Inc., April 1987.

....for the program. This research was partially supported by a Schlumberger Foundation Fellowship and ONR contract N0001489 J 3201 In general, an access to the local memory of a data processor is faster than that of a remote processor. The CM provides two mechanisms to allow remote memory access[12]: a general purpose router which can be used by any processor to access the local memory of any other processor, and a special purpose 2 dimensional rectangular grid called the NEWS grid which allows relatively fast communication among the processors that lie along the grid. Ignoring the ....

....1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 0 7 6 5 4 3 2 1 1 2 3 4 5 6 7 0 0 7 6 5 4 3 2 1 1 2 3 4 5 6 7 0 Figure 9: A copy mapping A[k] i] M[k] reduce (I,K) virtual M[3] g map f int A[3] 3] I:i=K; K:k=f0. 2g, index set 1 2 3 4 5 6 7 8 9 1,2,3 4,5,6 7,8,9 Figure 10: A reduce mapping using a CM 2 [12] with a sun 4 front end. All runs used 8k physical processors. The mapped code shown is actual code generated by the UC pre processor, with some numerical constants replaced by the corresponding symbols for readability. 5.1 Copy A copy mapping is used to reduce the need for broadcasts. Consider ....

Thinking Machines Corporation. Connection Machine Model CM-2 Technical Summary, April 1987.

.... ffl Permutation routing network ffl Permutation routing network with combining for reductions ffl Segmented scan network ffl Reconfigurable broadcast network These lists were created to match the architecture space spanned by machines such as the MasPar MP1 2 [3] the Thinking Machines CM2 200 [35], the Cambridge Systems DAP [27] the MCNC Blitzen [4] the UMass Hughes CAAPP [39] the Current Technology MM32k [11] the MIT Abacus [5] and numerous other similar machines. Considering first the list of required hardware features, there are three items where we are somewhat stricter than the ....

....in using a machine to its potential. In order to meet this requirement, ICL has a number of additional methods that operate on Planes: these perform permutations, reductions, scans, and broadcasts. These methods map directly to: permutation networks such as those in the Connection Machine [35] and MasPar MP1 2 [3] combining scanning networks as in the Connection Machine, and broadcast networks as in the Polymorphic Torus [24] Clip 4 [8] DAP [19] and CAAPP [39] Local indexing, as in the MasPar and Blitzen [4] is supported by indexing an array of Planes with an index Plane to ....

Thinking Machines Corporation. Connection Machine Model: CM-2 Technical Summary. Cambridge, MA, 1987.

....have a larger number of processors so that less memory is required per node. On examining fine grained systems such as the CM 2 and the DAP however, we find that the lack of local memory is even more critical for these machines. For example, in CM 2 each processor has only 8K bytes of local memory[38]. So we are forced to use secondary storage, which leads to a new bottleneck in I O transfers. For the 1 million cell network, the processors are capable of completing 1 iteration per second, but the I O bottleneck restricts speed to over 14 seconds per iteration. On the other hand, if infinite ....

....Linear systolic array 10 17M 320K BP CMU[8, 39] of ten processors (NETtalk) Butterfly, 128 68020 nodes 16M 120M Runs Rochester BBN[4, 8] connected by connectionist butterfly network;VAX simulator[13] CM 2, 64K single bit processors, 13M 64M BP[5] Thinking Machines hypercube network; NETtalk) Corp. [38, 8] VAX or Symbolics MX 1 16 16 digital signal 120M 50M Projected performance MIT processors; Lincoln Labs[8, 22] Lisp machine X MP 2, Two Cray processors 50M 2M Estimated performance Cray Research[8] with shared memory IPS = Interconnects per second; BP = Back Propagation; CP = Counter Propagation; ....

Thinking Machines. Connection machine model CM-2 technical summary. Technical Report HA87-4, Thinking Machines, Inc., April 1987.

....are often building blocks for larger parallel machines. Whether or not we can make sense out of results that have overflowed or undergone other exceptions depends on the application; it is true often enough to be quite useful. Now we give some examples of regularity in communication. The CM 2 [193] may be thought of in different ways; for us it is convenient to think of it as 2048 processors connected in an 11 dimensional hypercube, with one processor and its memory at each of the 2048 corners of the cube, and a physical connection along each edge connecting each corner to its 11 nearest ....

Thinking Machines Corporation. Connection Machine Model CM-2 Technical Summary, April 1987.

....with respect to speed and functionality; it is meant to demonstrate the feasibility of the approach, and for experimentation. Mid term goals are the portation to dedicated connectionist architectures like ICSI s Rap [Morgan, 1990] or to massively parallel systems like the connection machine [Thi, 1987]. Representation An important goal for future implementations will be to overcome the quadratic number of units. In most cases, only a small fraction of the units are actually used for a particular problem; thus the recruitment of units from an overall pool of units and the dynamical establishment ....

Thinking Machines Corporation. Connection Machine Model CM-2 Technical Summary. Technical Report HA87-4, 1987.

....as possible for the two programs. The parallel algorithms were executed on the Connection Machine model CM 2 a singleinstruction multiple data (SIMD) parallel computer which, in its largest configuration, contains 65,536 bit serial processors and 2048 Weitek floating point units (FPU s) [15]. The bit serial processors are clustered together into groups of 16 within a single integrated circuit, and these IC s are connected together in a 12 dimensional hypercube. Two IC s, or 32 processors, share a single Weitek FPU. Note that a fully configured CM 2 contains 2048 times as much ....

Thinking Machines Corporation, Cambridge, Massachusetts, USA, Connection Machine Model CM-2 Technical Summary, May 1989. Technical Report-General TR 89-1.

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Thinking Machines Corporation, Connection Machine Model CM-2 Technical Summary,Version 5.1, May 1989.

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Thinking Machines Corporation, Connection Machine Model CM-2 Technical Summary,Version 5.1, May1989.

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Thinking Machines Corp. Connection Machine Model CM-2 Technical Summary. Technical Report HA87-4. (April 1987).

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Thinking Machines Corp.. Connection Machine Model CM-2 Technical Summary. Thinking Machines Corp., 1990.

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