4 citations found. Retrieving documents...
Jullien, G.A., Miller, W.C., Grondin, R., Wang, Z., Zhang, D., Del Pup, L., and Bizzan, S. "Woodchuck: A Low-Level Synthesizer for Dynamic Pipelined DSP Arithmetic Logic Blocks." Proceedings of the International Symposium on Circuits and Systems, 1, pp.176-179, 1992.

 Home/Search   Document Not in Database   Summary   Related Articles   Check  

This paper is cited in the following contexts:
Optimal Transistor Tapering for High-Speed CMOS Circuits - Li Ding And (2002)   (Correct)

....the delay terms through the effective resistance of each transistor. The authors proposed an analytical approach to the FET chain tapering problem based on an observation that the delay terms were equal in near optimally sized FET chains. This has been incorporated into an automated layout system [8]. However, they could not give any analytical proof for their observation. In this paper, we propose a new tapering shape which is a composition of constant and exponential functions. We give analytical proof that the proposed tapering scheme is optimal in the long chain limit. Simulations ....

G. A. Jullien, W. C. Miller, R. Grondin, Z. Wang, L. Del Pup, and B. Bizzan, "Woodchuck: A Low-Level Synthesizer for Dynamic Pipelined DSP Arithmetic Logic Blocks," Proc. IEEE Int. Symp. on Circuits and Systems, pp. 176-179, 1992.


Redundant Finite Rings for Fault-Tolerant Signal Processors - Jullien Bizzan Wigley (1994)   Self-citation (Jullien Miller Bizzan)   (Correct)

No context found.

Jullien, G.A., Miller, W.C., Grondin, R., Wang, Z., Zhang, D., Del Pup, L., and Bizzan, S. "Woodchuck: A Low-Level Synthesizer for Dynamic Pipelined DSP Arithmetic Logic Blocks." Proceedings of the International Symposium on Circuits and Systems, 1, pp.176-179, 1992.


VLSI Research Group - Windsor University Of (1994)   Self-citation (Jullien)   (Correct)

No context found.

Jullien, G.A., Miller, W.C., Grondin, R., Wang, Z., Zhang, D., Del Pup, L., and Bizzan, S., 1992. "WoodChuck: A Low-Level Synthesizer for Dynamic Pipelined DSP Arithmetic Logic Blocks." 1992 IEEE Int. Symp. on Circuits and Systems, San Diego, pp. 176-179


Exploiting Redundancy in Modulus Replication Inner Product.. - Shahkarami (1999)   (1 citation)  (Correct)

No context found.

Jullien, G. A., W. C. Miller, R. Grondin, Z. Wang, D. Zhang, L. D. Pup and S. Bizzan. "WoodChuck: A Low-Level Synthesizer for Dynamic Pipelined DSP Arithmetic Logic Blocks." IEEE International Symposium on Circuits and Systems. vol. 1 pp. 176-179, 1992.

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC