Steven K. Reinhardt. Mechanisms for Distributed Shared Memory. PhD thesis, Computer Sciences Department, University of Wisconsin-Madison, December 1996. Home/Search Document Details and Download
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Fine-Grain Distributed Shared Memory on Clusters of Workstations - Schoinas (1997) (3 citations) (Correct)
.... that the computation is executing (i.e. a processor) Reinhardt, et al. have shown that the overheads to support user level coherence protocols do not inhibit high end Tempest implementations, such as the proposed Typhoon designs, from being competitive to dedicated hardware solutions [RPW96,Rei96] Such implementations, targeted for the server market, emphasize performance over cost. These systems provide hardware support for both the access control test and protocol action. For example, a dedicated processor for protocol actions can minimize invocation and action overhead while still ....
.... hardware performs an action quickly, research has shown that no single protocol is optimal for all applications [KMRS88] or even for all data structures within an application [BCZ90,FLR 94] Hybrid hardware soft ware protocols such as Alewife s LimitLESS [CKA91] DirlSW [HLRW93] and Typhoon 2 [Rei96] implement the expected common cases in hardware and trap to system software to handle complex, infrequent events. High design costs and resource constraints make custom hardware unattractive. Nevertheless, as the relatively large number of commercially available systems suggests, system vendors ....
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Steven K. Reinhardt. Mechanisms for Distributed Shared Memory. PhD thesis, Computer Sciences Department, University of Wisconsin-Madison, December 1996.
Fine-Grain Protocol Execution Mechanisms & Scheduling Policies on .. - Falsafi (1998) (Correct)
....relinquishes the queue and requests to bind to another non empty queue. Dynamic binding is common in systems with multiple protocol event queues. An example of such a system is the Typhoon 0 fine grain DSM, that uses separate block access fault and message receive queues (as in Typhoon 0 [Rei96] Other examples are messaging systems which use backup message buffer space in memory due to limited message buffering on the network interface card [Sch97,MFHW96] Dynamic binding also allows for the use of cachable queues. Cachable queues typically maintain information as to whether a queue ....
....when a processor is accessing remote data [Pfi95,SFL 94] In many such systems, hardware detects accesses to remote data by inspecting transactions on the memory bus. Upon detecting a remote data access, some systems generate a bus error exception in response to the memory bus transaction [Rei96] Upon a bus error, the system saves the processor state e.g. the condition code registers and the program counter necessary to resume the computation exactly at the point of the exception. These systems can also use a simple software handshake for resuming the computation by simply making ....
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Steven K. Reinhardt. Mechanisms for Distributed Shared Memory. PhD thesis, Computer Sciences Department, University of Wisconsin--Madison, 1996.
Validation and Application of the LoPC model - Glass, Sastry, Gopal (1997) (Correct)
....of this send receive loop. We then calculate L as the round trip time minus the overheads necessary to send a message, receive a message (remotely) and process a reply (locally) L = T N Gamma S s Gamma S q Gamma S y 2 (2) L is approximately 13s, in agreement with Reinhardt s measurements [9]. 3 4 The Extended LoPC Model In this section we extend the LoPC model to account for the observed difference between request handler cost and reply handler cost. We also extend the model to allow the message handlers to have non exponential service time distribution. They might have ....
Steven K. Reinhardt. Mechanisms for Distributed Shared Memory. PhD thesis, University of Wisconsin--Madison, 1996. 10
Mechanisms for Efficient Shared-Memory, Lock-Based Synchronization - Kagi (1999) (2 citations) (Correct)
....the user can supply custom protocols that can maintain cache coherence differently for distinct regions of memory. In his thesis, Reinhardt discusses implementation alternatives of this flexible scheme that range from low cost (but low performance) to high performance (at a higher price) 130 [Rei96]. At one extreme, he describes an all software system without any special hardware support beyond the capability to send and receive messages. In this environment, the (compute) processor itself performs the protocol processing. At the other extreme, he proposes a tightly integrated system ....
....I measure the time it takes for all processors to complete the microbenchmark iterations. I report the best of three measurements in an attempt to reduce the impact of external perturbation that I have no control over (such as the underlying operating system scheduling other processes) Reinhardt [Rei96] and Schoinas [Sch97] use the same methodology for similar experiments. I plot the completion time (in seconds) of the microbenchmark loop in Figure 4.2 for a number of nodes ranging from 1 to 16. 1 I measure the throughput of test set (denoted TS) test test set (denoted TTS) MCS, CQL, ....
Steven K. Reinhardt. Mechanisms for Distributed Shared Memory. PhD thesis, University of Wisconsin, Madison, WI, 1996.
Hardware Support for Flexible Distributed Shared Memory - Reinhardt, al. (1998) (1 citation) Self-citation (Reinhardt) (Correct)
....already an integral part of the base workstation system. 12 The rest of this section describes the systems more fully. The first subsection covers common features; following subsections describe Typhoon, Typhoon 1, and Typhoon 0 in turn. Additional details can be found in previous publications [41, 44, 45]. 3.1 Common features To focus on the impact of the organizational differences in our designs, we assume similar tech nology for the three common components the protocol processor, network interface, and access control logic. The protocol processor is a general purpose CPU. For convenience, ....
....as a FPGA based plug in board called Vortex. Due to space limitations, we describe the prototype only briefly, focusing on changes from the simulated Typhoon 0 of Section 4. We then report performance measurements and compare measured speedups with simulation results. Reinhardt s Ph.D. thesis [41] describes the prototype system more fully, including operating system support. Pfile s master s report [39] details the Vortex hardware implementation. 5.1 Differences between the simulated and constructed systems Our simulated Typhoon 0 system of Section 4 reflects our original design for the ....
S. K. Reinhardt. Mechanisms for Distributed Shared Memory. PhD thesis, Computer Sciences Department, University of Wisconsin--Madison, Dec. 1996.
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