O. Temam, C. Fricker, and W. Jalby, "Impact of Cache Interferences on Usual Numerical Dense Loop Nests, " Proceedings of The IEEE, Vol. 81, No. 8, pp. 1103-- 1115, August 1993.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....which is the interference between two different variables, and self interference, caused by references to the same array. They develop a procedure to determine the blocking parameters to eliminate self interference, which they found to cause the largest increase in miss rates. Temam et al.[14], at tempt to derive analytical expressions for the cache miss rates. They carefully examine the role of cache interferences, but their analysis is limited to directmapped caches and rectangular loops with only one loop index per dimension. All the above methods analyze a program loop nest to ....

O. Teman, C. Fricker, and W. Jalby. Impact of Cache Interferences on Usual Numerical Dense Loop Nests. Pro- ceedings of the IEEE, 81(8), August 1993.

.... limited flexibility of most caches [10] Array based applications can also exhibit poor address sequentiality, which depends on the stride of the array references; in numerical codes, the regular strides that occur within loop nests cause cache interference that degrades performance considerably [3, 4, 19]. Constant but non unit stride accesses do not in general improve cache performance; even after blocking, there is a relatively high variance in cache misses for di#erent matrix sizes [13] Even if the working set fits in the cache for blocked loop nests, cache utilization still remains poor due ....

O. Temam, C. Fricker, and W. Jalby. Impact of cache interferences on usual numerical dense loop nests. Proceedings of the IEEE, 81(8):1103--1115, Aug. 1993.

....which is the interference between two different variables, and self interference, caused by references to the same array. They develop a procedure to determine the blocking parameters to eliminate self interference, which they found to cause the largest increase in miss rates. Temam et al.[14], attempt to derive analytical expressions for the cache miss rates. They carefully examine the role of cache interferences, but their analysis is limited to directmapped caches and rectangular loops with only one loop index per dimension. All the above methods analyze a program loop nest to ....

O. Teman, C. Fricker, and W. Jalby. Impact of Cache Interferences on Usual Numerical Dense Loop Nests. Proceedings of the IEEE, 81(8), August 1993.

....accesses between two references to the same address) is reduced to less than the cache size. Eisenbeis et al. [3] and Wolf and Lam [21] have developed data locality optimizing algorithms that automatically block a class of regular numerical programs. Subsequently, Lam et al. [11] and Temam et al. [17] show that cache interference effects in blocked programs can greatly reduce the benefit of blocking using these data locality optimization techniques. In many cases, Lam et al. found that block sizes that are often only a tenth of the computed optimal block sizes yield the best performance on ....

O. Temam, C. Fricker, and W. Jalby. Impact of cache interference on usual numerical dense loop nests. Proc. IEEE, 81(8):1103--1115, Aug 1993.

....l of the nest graph x. Then we define Cost(V Q xl [j] as the number of cache misses incurred due to array Q when the dimension j is its FCD and the loop l is placed in the innermost position in the nest x. Although several methods can be used to estimate Cost(V Q xl [j] e.g. see [35] 13] [50], 47] 14] 51] 44] and the references therein) in our experiments we use a slightly modified form of the approach proposed by Sarkar et al. 47] as this approach is relatively easy to implement and results in good estimations for the codes encountered in practice. Since we also want to ....

O. Temam, C. Fricker, and W. Jalby. Impact of cache interferences on usual numerical dense loop nests. Proceedings of the IEEE, 81(8):1103--1115, 1993.

....dimensions are powers of 2. However, the amount of padding which minimizes the occurrence of conflicts between arrays is difficult to determine directly when data from different arrays must remain cached for reuse. Hence, arbitrary use of padding cannot guarantee the best performance. Temam et al. [9] study conflicts arising from array references in loop nests typical of scientific applications. They analyze specific instances of self and cross conflicts, and suggest the use of padding and careful placement of arrays in memory. However, no detailed methodology is described for resolving ....

O. Temam, C. Fricker, and W. Jalby. Impact of cache interferences on usual numerical dense loop nests. Proceedings of the IEEE, 81(8):1103--1115, 1993.

....dimensions are powers of 2. However, the amount of padding which minimizes the occurrence of conflicts between arrays is difficult to determine directly when data from different arrays must remain cached for reuse. Hence, arbitrary use of padding cannot guarantee the best performance. Temam et al. [14] study conflicts arising from array references in loop nests typical of scientific applications. They analyze specific instances of self and cross conflicts, and suggest the use of padding and careful placement of arrays in memory. However, no detailed methodology is described for resolving ....

O. Temam, C. Fricker, and W. Jalby. Impact of cache interferences on usual numerical dense loop nests. Proceedings of the IEEE, 81(8):1103--1115, 1993.

....between two references which subscripts have identical linear expressions) and external cross interferences (cross interferences between any two other references) The most frequent and most difficult type of interferences to evaluate are external cross interferences. We have mentioned in Temam et al. 1993] that two different types of evaluation can be performed: approximate or precise, but up to now we have mostly focused on the approximate evaluation. In this article, precise evaluation of external cross interferences is shown to be sometimes necessary for computing the near optimal block size of ....

Temam, O., Fricker, C., and Jalby, W. 1993. Impact of cache interferences on usual numerical dense loop nests. In Proc. IEEE, special issue on Computer Performance Evaluation.

.... cache interferences in direct mapped caches for frequently occurring numerical loop nests (section 3) The third goal is to illustrate the model accuracy through several examples (sections 3 and 4) A first version of the framework for computing cache interferences has been presented in [14]. In [15] this model has been applied to drive data copying strategies. The present paper provides the details of the computations and illustrates the model accuracy. Experiments For all examples, three types of statistics are provided: the simulated execution time (for a whole loop or for an ....

O. Temam, C. Fricker, and W. Jalby. Impact of cache interferences on usual numerical dense loop nests. In Proceedings of the IEEE, special issue on Computer Performance Evaluation, 1993.

....experiments. In section 3, the model of cache interferences is used to enhance the optimal block size computation, and conversely, to show that blocking can be used to significantly reduce cache interferences. 2 Modeling Cache Behavior This section recalls the notions previously developed in [14, 15, 8]. In this section, the techniques used to estimate the number of interference misses are presented. Basic Concepts DO 1 j1=0,N 1 DO 1 j2=0,N 1 reg = X(j2,j1) DO 1 j3=0,N 1 Z(j3,j1) reg Y(j3,j2) 1 CONTINUE Evaluating the miss ratio of a loop nest amounts to counting, for each reference, the ....

O. Temam, C. Fricker, and W. Jalby. Impact of cache interferences on usual numerical dense loop nests. In Proceedings of the IEEE, special issue on Computer Performance Evaluation, 1993.

...., namely misses that are due to using a cache whose size is too small to hold the working set of cache lines. Typically, however, caches have a very low degree associativity. Often, they are direct mapped. Therefore, as demonstrated by Lam et al. LRW91] Ferrante et al. FST91] and Jalby et al. [TFJ93], they can still suffer from a high degree of conflict misses , thereby precluding effective cache utilization. Moreover, the severity of cache conflicts can vary greatly with slight variations in problem size and starting addresses, making performance difficult to even predict, let al..one ....

O. Temam, C. Fricker, and W. Jalby. Impact of cache interferences on usual numerical dense loop nests. In Proceedings of the IEEE, special issue on Computer Performance Evaluation, 1993.

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O. Temam, C. Fricker, and W. Jalby, "Impact of Cache Interferences on Usual Numerical Dense Loop Nests, " Proceedings of The IEEE, Vol. 81, No. 8, pp. 1103-- 1115, August 1993.

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O. Temam, C. Fricker, and W. Jalby. Impact of cache interferences on usual numerical dense loop nests. Proceedings of the IEEE, 81(8):1103--1115, 1993.

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Olivier Temam, Christine Fricker, and William Jalby, "Impact of cache interferences on usual numerical dense loop nests," Proceedings of the IEEE, vol. 81, no. 8, pp. 1103-1115, Aug 1993.

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