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Josep Torrellas, Anoop Gupta, and John Hennessy, Characterizing the caching and synchronization performance of a multiprocessor operating system, In Proc. of 5th Int. Conf. on Arch. Support for Prog. Lang. and Operating Systems, pages 162--174. ACM, 1992. 59

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Clustered Objects: Initial Design, Implementation and Evaluation - Appavoo   (Correct)

....[39, 24, 13, 33, 9] 1.2 SMP Operating Systems Poor performance of the operating system can have considerable impact on application performance. For example, for parallel workloads studied by Torrellas et al. the operating system accounted for as much as 32 47 of the non idle execution time[36]. Similarly Xia and Torrellas showed that for a di#erent set of workloads, 42 54 of time was spent in the operating system [43] while Chapin et al. found that 24 of total execution time was spent in the operating system[6] for their workload. To avoid the operating system from limiting ....

Josep Torrellas, Anoop Gupta, and John Hennessy. Characterizing the caching and synchronization performance of a multiprocessor operating system. In Proceedings of the 5th International Conference on Architectural Support for Programming Languages and Operating System (ASPLOS), volume 27, pages 162--174, New York, NY, September 1992. ACM Press.


Parallel Virtual Memory for Time Shared Environments - Reis, Campos, Scherson   (Correct)

....that generated the page fault, and global replacement, which considers all pages in main memory to be candidates for replacement, regardless of which process owns a particular page. Even though we are aware of the importance of application s page misses induced by the OS itself as studied in [10] we did not take this fact into consideration during our simulations since reliable measurements of OS activity as related with cache utilization can not usually be taken from machine simulators. In this paper we concentrate our research efforts on the set of policies offered by the operating ....

Josep Torrellas, Anoop Gupta, and John Hennessy. Characterizing the Caching and Synchronization Performance of a Multiprocessor Operating System. In ASPLOS-V, pages 162 --174, 1992.


Dynamic Random Access Memory: A Survey - Mitra (1999)   (Correct)

.... the memory chip have significant advantage since these operations seem to be quite important from operating system point of view as any read write operation from to a device needs a copy from the kernel to from user space and is a significant performance bottleneck for memory system [R 95, TGH92, CB93] Memory clear operations are frequently needed since new memory pages are often zeroed before handling it down to application. We also observe that with increasing memory chip density, most DRAM chips in the future are expected to include some built in logic circuit that already has the ....

J. Torellas, A. Gupta, and J. Hennessy. Characterizing the Caching and Synchronization Performance of a Multiprocessor Operating System. In International Conference on Architectural Support for Programming Languages and Operating Systems, 1992.


The Impact of Software Structure and Policy on CPU and Memory.. - Chen (1994)   (5 citations)  (Correct)

....[1, 10] The beliefs in Table 1 1 are stated as assertions along with their impact for system designers. These assertions are derived from the computer systems literature and are based on past experiences [31] measurements of microbenchmarks [15, 63] and extensive measurements of real systems [3, 4, 6, 24, 26, 57, 78, 82]. This thesis will explore behavior related to the beliefs in Table 1 1, for truth as well as performance impact. This exploration will demonstrate that system designers have an inadequate and sometimes incorrect understanding of the performance impact of system structure for a current ....

....instruction and The operating system isn t getting faster as fast data locality than user programs [24, 26] as user programs. 2. System execution is more dependent on A balanced cache system for user programs may instruction cache behavior than is user not be balanced for the system. execution [78]. 3. Collisions between user and system references A split user system cache could improve lead to significant performance degradation in the performance. memory system (cache and TLB) 60, 78, 82] 4. Self interference is a problem in system Increased cache associativity and or the use of ....

[Article contains additional citation context not shown here]

Josep Torellas, Anoop Gupta, and John Hennessy. Characterizing the Caching and Synchronization Performance of a Multiprocessor Operating System. The Proceedings of the Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, October, 1992, pp. 162-174.


Software Methods for System Address Tracing: Implementation.. - Chen, Wall, Borg (1994)   (4 citations)  (Correct)

.... 5000 Forbes Avenue 250 University Avenue 250 University Avenue Pittsburgh, PA 15213 Palo Alto, CA 94301 Palo Alto, CA 94301 Abstract Systems for recording address traces of operating system activity have frequently relied on special purpose hardware and microcode modifications for data collection [1, 2, 11, 10, 32, 30]. In the last decade, changes in computer systems design have made the implementation of such hardware and microcode based tracing systems impractical. This paper documents the evolution of a group of software methods to collect system traces. The tools require no special purpose hardware and no ....

.... in cache behavior [16, 17, 26, 28, 15] prefetching [6] the importance of long traces [5] the impact of context switches [20] and studies of TLB and page behavior [9, 18, 29] These user only studies are useful but limited, as system activity can have a large impact on overall performance [2, 12, 30]. More recent work documenting significant performance problems for system execution on RISC based computer systems [3, 24] suggests that system behavior needs more attention in performance studies and hardware design. Clark and Emer were among the first to emphasize the importance of system ....

[Article contains additional citation context not shown here]

Josep Torellas, Anoop Gupta, and John Hennessy. Characterizing the Caching and Synchronization Performance of a Multiprocessor Operating System. The Proceedings of the Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, October, 1992, pp. 162-174.


Using Set Sampling for Level Three Cache Studies - Thornock (1999)   (Correct)

No context found.

Josep Torrellas, Anoop Gupta, and John Hennessy, Characterizing the caching and synchronization performance of a multiprocessor operating system, In Proc. of 5th Int. Conf. on Arch. Support for Prog. Lang. and Operating Systems, pages 162--174. ACM, 1992. 59


Citcat: Constructing Instruction Traces From Cache-Filtered.. - Rose (1999)   (Correct)

No context found.

Josep Torrellas, Anoop Gupta, John Hennessy: "Characterizing the caching and synchronization performance of a multiprocessor operating system" in Proceedings of the Fifth International Conference on Architectural Support for Programming Languages and Operating Systems (ACM 1992), pp. 162-174.

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