John W. Lockwood, Jon S. Turner, David E. Taylor, Field Programmable Port Extender (FPX) for Distributed Routing and Queuing, ACM International Symposium on Field Programmable Gate Arrays (FPGA'2000. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Architecture and Hardware for Scheduling Gigabit.. - Krishnamurthy.. (2002) (Correct)
....first Equal Deadlines and zero window constraints, order highest window denominator first Equal Deadlines and equal non zero window constraints, order lowest window numerator first All other cases: first come first serve Table 1. Scheduler Decision Rules Related Work A number of efforts [15], 10] 8] and [7] have detailed and constructed priority queuing architectures and corresponding hardware in switches and network interfaces. The DWCS scheduling framework allows flexible reconfiguration of the native scheduling discipline into EDF, static priority and fair share using more ....
....and temporal bounds needed by different layers of the network stack, frequently by exploiting parallelism in the data flow functions. These may be realized as ASICs or preferably in reconfigurable logic or FPGAs to keep pace with the constantly changing landscape of standards and protocols [15, 11]. Our hardware architecture uses a combination of processor datapath (preferably a Network Processor) and FPGA interconnected using a high speed interconnect. Connection setup, admission control, stream identification and buffering are managed by the processor while packets in streams are ....
John W. Lockwood, Jon S. Turner, David E. Taylor, Field Programmable Port Extender (FPX) for Distributed Routing and Queuing, ACM International Symposium on Field Programmable Gate Arrays (FPGA '2000.
Internet-based Tool for System-on-Chip Integration - David Lim Christopher (2003) Self-citation (Lockwood) (Correct)
No context found.
John W. Lockwood, Jon S. Turner, David E. Taylor, Field Programmable Port Extender (FPX) for Distributed Routing and Queuing, ACM International Symposium on Field Programmable Gate Arrays (FPGA'2000.
Internet-based Tool for System-On-Chip Project Testing.. - Christopher Neely.. (2003) Self-citation (Lockwood) (Correct)
....a tool in a semester long course in Reconfigurable System on Chip Design to teach graduate students how to build network hardware using hardware description languages. Students created an extensible Internet firewall, which were tested using the Field Programmable Port Extender (FPX) platform [1] [3] and the Project Test Server. A firewall is usually placed on the edge on a network and protects the network by identifying and discarding malicious and spurious traffic comprised of Internet protocol (IP) packets. The firewalls developed in this class by the students were verified by passing ....
John W. Lockwood, Jon S. Turner, David E. Taylor, Field Programmable Port Extender (FPX) for Distributed Routing and Queuing, ACM International Symposium on Field Programmable Gate Arrays (FPGA'2000.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC