J. Ferrante, V. Sarkar, and W. Thrash. On estimating and enhancing cache e#ectiveness. In LCPC, volume 589 of LNCS, pages 328--343, 1991. Home/Search Document Not in Database Summary Related Articles Check |
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....be useful in guiding various automatic memory optimisations and also in improving the simulation times of cache simulators and pro lers. Porter eld [19] introduces the concept of over ow iteration for predicting the miss ratio for a fully setassociative LRU cache. Ferrante, Sarkar and Thrash [10] provide closed form formulas to estimate the capacity misses of a loop nest. Temam, Fricker and Jalby 10 [24] also consider con ict misses but for a subset of array references studied in this paper. Wolf and Lam [30] propose to use vectors to describe data reuse for uniformly generated ....
J. Ferrante, V. Sarkar, and W. Thrash. On estimating and enhancing cache e ectiveness. In 4th Workshop on languages and compilers for parallel computing (LCPC'91), pages 328-343, 1991.
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J. Ferrante, V. Sarkar, and W. Thrash. On estimating and enhancing cache e#ectiveness. In LCPC, volume 589 of LNCS, pages 328--343, 1991.
Experiences with Enumeration of Integer.. - Verdoolaege.. (2005) (Correct)
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J. Ferrante, V. Sarkar, and W. Thrash. On estimating and enhancing cache e#ectiveness. In LCPC, volume 589 of LNCS, pages 328--343, 1991.
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J. Ferrante, V. Sarkar, W. Thrash, On estimating and enhancing cache e#ectiveness, in: U. Banerjee, D. Gelernter, A. Nicolau, D. Padua (Eds.), Proc. of the Fourth International Workshop on Languages and Compilers for Parallel Computing, Lecture Notes in Computer Science, vol. 589, Intel Corp., Springer-Verlag, Santa Clara, CA, 1991, pp. 328--343.
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J. Ferrante, V. Sarkar, and W. Thrash. On estimating and enhancing cache e#ectiveness. In 1991.
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Ferrante, J., Sarkar, V., Thrash, W.: On estimating and enhancing cache e#ectiveness. In Banerjee, U., et al., eds.: Proceedings of the Fourth Annual Workshop on Programming Languages and Compilers for Parallel Computing. Volume 589 of Lecture Notes in Computer Science., Santa Clara, CA, Springer (1991) 328--343
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J. Ferrante, V. Sarkar, and W. Thrash. On Estimating and Enhancing Cache E#ectiveness. In 4th International Workshop on Languages and Compilers for Parallel Computing, August 1991.
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J. Ferrante, V. Sarkar, and W. Thrash. On estimating and enhancing cache e#ectiveness. In U. Banerjee, D. Gelernter, A. Nicolau, and D. Padua, editors, Languages and Compilers for Parallel Computing, Fourth International Workshop, Santa Clara, CA, August 1991. SpringerVerlag.
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J. Ferrante, V. Sarkar, and W. Thrash. On estimating and enhancing cache e#ectiveness. In 4th Workshop on Compilers for Parallel Computers, pages 328--343, 1991.
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J. Ferrante, V. Sarkar, and W. Trash. On Estimating and Enhancing Cache E ectiveness. In U. Banerjee, editor, Proc. of the Fourth Int. Workshop on Languages and Compilers for Parallel Computing. Springer, 1991.
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