GUPTA,R.K.,COELHO,C.N.,AND MICHELI, G. D. Synthesis and simulation of digital systems containing interacting hardware and software components. In Proc. of the 29th Design Automation Conference (DAC '92) (Anaheim, CA, June 1992).  Home/Search   Document Details and Download   Summary   Related Articles   Check

....it reduces both the number of simulation events, and the number of simulated bits. Both reductions are 1 effective when using an event driven hardware simulator, and only the latter is effective when using a cycle based hardware simulator. Our approach is different from that of Gupta et al. in [6], that relies on a single custom simulator for hardware and software, because we can use any commercial VHDL simulator. It is also different from the class of solutions described e.g. in [7] 11] that execute the software and hardware partition in separate processes, keeping track of time ....

R. K. Gupta, C. N. C. Jr., and G. D. Micheli "Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components " In Proceedings of the Design Automation Conference, June 1992.

....single CPU single ASIC target architecture. Even though this architecture is a special and limited example of a distributed system, it is relevant in the area of embedded systems [16] In this class of work we can cite LYCOS [15] COSYMA [19] and PMOSS [7] Other design systems, such as Vulcan [11], TOSCA [1] and COBRA [12] can support more than one ASIC. Several research groups tried to target multiprocessor architectures, e.g. POLIS [2] Chinook [5] SpecSyn [8] CoWare [14,22,23] and the work led by Wolf and Yen [24] In the POLIS [2] system, the target architecture is a system ....

R.K. Gupta, C. Coelho, and G. De Micheli, "Synthesis and simulation of digital systems containing interacting hardware and software components", In the 29th Design Automation Conference, June 1992.

....with the QR decomposition application. Finally, Section VIII discusses several open issues and Section IX concludes the paper. II. Related work Various research groups are active in the field of modeling and simulating heterogeneous embedded systems, of which some are academic efforts (e.g. [6, 12, 10]) and others commercial [9] and industrial efforts (e.g. 5] Many efforts in this field co simulate the software parts, which are mapped onto a programmable processor, and the hardware components and their interactions together in one simulation. Because an explicit distinction is made between ....

R.K. Gupta, C.N. Coelho Jr., and G. De Micheli. Synthesis and simulation of digital systems containing interacting hardware and software components. In Proc. of the Design Automation Conference, pages 225--230, June 1992.

....study with the QR decomposition application. Finally, Section 8 discusses several open issues and Section 9 concludes the paper. 2 Related work Various research groups are active in the field of modeling and simulating heterogeneous embedded systems, of which some are academic efforts (e.g. [6, 11, 9]) and others commercial [8] and industrial efforts (e.g. 5] Many efforts in this field co simulate the software parts, which are mapped onto a programmable processor, and the hardware components and their interactions together in one simulation. Because an explicit distinction is made between ....

R.K. Gupta, C.N. Coelho Jr., and G. De Micheli. Synthesis and simulation of digital systems containing interacting hardware and software components. In Proc. of the Design Automation Conference, pages 225--230, June 1992.

....fully software system implementation moving pieces of software toward the hardware domain and, viceversa, strategies aiming at obtaining the minimum cost by replacing pieces of hardware with software code. Two pioneer researches, representing this duality of goals, are COSYMA [Ben93] and VULCAN II [Gup92] [Gup93] The first assumes as input of the co design flow a textual specification written in the C x language, a C extension supporting task level concurrence and timing constraints. Such a specification is translated into an internal representation (Extended Syntax Graph) on which preliminary ....

....applications only [Buc94] Sut93] A survey of alternative strategies for more general applications is presented in [Alt91] and [Vah95b] while [Wol94] provides an extensive survey of the existing open research issues and project on embedded system co design. A specific approach is 4 proposed in [Gup92] through the Poseidon system, an event driven scheduler able to manage mixed hw sw models. Hardware models are simulated at gate level (i.e. after synthesis and optimization) by the Mercury logic simulator, while the generated software in C language is first compiled into assembly code and managed ....

R.K.Gupta, C.Coelho, G.De Micheli, Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components, Proc. of the 29th DAC, June 1992. 29

....hard because of their heterogeneity. Software and hardware should be simulated simultaneously, and furthermore hardware and software simulations must be kept synchronized, so that they behave as close as possible to the physical implementation. Several methods have been proposed for co simulation [8], 10] 12] 15] 16] Research done in software compilation and validation techniques has been mainly directed at general purpose software, and in most cases the developed techniques are not directly applicable to embedded software (that interacts with hardware) The importance of embedded ....

R. K. Gupta, C. N. Coelho Jr, and G. De Micheli. Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components. In Proceedings of the Design Automation Conference, June 1992.

....it reduces both the number of simulation events, and the number of simulated bits. Both reductions are effective when using an event driven hardware simulator, and only the latter is ef1 fective when using a cycle based hardware simulator. Our approach is different from those described e.g. in [9, 13, 14], that rely on a single custom simulator for hardware and software, because we can use any commercial VHDL simulator. It is also different from the class of solutions described e.g. in [11, 19, 20, 6, 21] that execute the software and hardware partitions in separate processes, keeping track of ....

R. K. Gupta, C. N. C. Jr., and G. D. Micheli "Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components" In Proceedings of the Design Automation Conference, June 1992. 7

....is translated into a form suitable for a single simulator, is conceptually simple, but computationally inefficient. Making better use of computational resources often means distributing the simulation, but synchronization of the processes becomes a challenge. The method proposed by Gupta et al. [56] is typical of the unified approach to co simulation. It relies on a single custom simulator for hardware and software that uses a single event queue and a high level, bus cycle model of the target CPU. Rowson [57] takes a more distributed approach that loosely links a hardware simulator with a ....

....Atomic objects (called stars ) are the primitives of the domain (e.g. EDWARDS et al. DESIGN OF EMBEDDED SYSTEMS: FORMAL MODELS, VALIDATION, AND SYNTHESIS 377 TABLE II A COMPARISON OF CO SIMULATION METHODS. Author Hardware Simulation Software Simulation Synchronization Mechanism Gupta [56] logic custom bus cycle custom single simulation Rowson [57] logic commercial host compiled handshake Wilson [58] logic commercial host compiled handshake Thomas [59] logic commercial host compiled handshake ten Hagen (1) 60] logic commercial host compiled handshake ten Hagen (2) 60] ....

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R. K. Gupta, C. N. Coelho Jr., and G. De Micheli, "Synthesis and simulation of digital systems containing interacting hardware and software components," in Proc. of the Design Automation Conf., June 1992.

....this verification bottleneck, concurrent simulation of full systems on chip with interacting hardware and software is now widely recognized as an important and viable verification approach. Co simulation verification of hardware and software has been proposed for a number of environments such as [8] [3] 12] 5] 10] 13] 4] 15] 2] and is also offered commercially by companies such as Mentor Graphics [9] Synopsys [14] and others. In this work our interest is system co simulation used during cycle accurate system verification, after the system architecture has been selected and hardware and ....

R. Gupta, C. Coelho, G. De Micheli, "Synthesis and simulation of digital systems containing interacting hardware and software components." DAC, pp. 225-230, 1992.

....algorithm [34] starts with a initial solution of having all operations in hardware. Then, based on a communication overhead cost criterion, some operations are moved into software. Co Simulation of the mixed hardware software system is performed by Poseidon, a tool developed by Gupta et al. [32] that performs concurrent simulation of multiple functional models. The simulator accepts a gate level description of the hardware, the assembly code of the software component 2 and a description of the interface, giving as result a cycle by cycle simulation. Gajski et al. developed a new ....

R. K. Gupta, C. N. Coelho, Jr., and G. De Micheli. Synthesis and simulation of digital systems containing interacting hardware and software components. In Proceedings of the 29 th Design Automation Conference - DAC '92, pages 225--230, Los Alamitos, CA, USA, June 1992. IEEE Computer Society Press.

....respectively. Their cosimulation is a combination of synchronized handshake and cycle accurate processor model. Thomas, Adams, and Schmit s cosimulation scheme [3] is similar to [2] but their technique is based on synchronized handshake with no processor model. Cosimulation techniques of Poseidon [4] and Ptolemy [5] need pin level model of processors. Their approaches are most accurate but take much more simulation time. In this paper, we present a hardware software cosimulation environment for heterogeneous systems. To be an efficient system verification environment for the rapid ....

R. K. Gupta, C. Coelho, and G. De Micheli, "Synthesis and simulation of digital systems containing interacting hardware and software components," Proceedings of 29th ACM/IEEE Design Automation Conference, pp. 129-134, June 1992.

....respectively. Their cosimulation is a combination of synchronized handshake and cycle accurate processor model. Cosimulation scheme of Thomas, et al. 18] is similar to [5] but their technique is based on synchronized handshake with no processor model. Cosimulation techniques of Poseidon [7] and Ptolemy [8] need pin level model of processors. Their approaches are most accurate but take much more simulation time. Although above existing approaches vary in model availability, accuracy, and time, they all did not take into account interface model explicitly or efficiently. In this ....

R. K. Gupta, C. Coelho, and G. De Micheli. Synthesis and simulation of digital systems containing interacting hardware and software components.Proc. 29th Des. Auto. Conf., pages 129--134, June 1992.

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R. Gupta, C. Coelho, and G. De Micheli, "Synthesis and simulation of digital systems containing interacting hardware and software components," in Proc. DAC, 1992, pp. 225--230.

No context found.

R. K. Gupta, C. Coelho, and G. D. Micheli, "Synthesis and simulation of digital systems containing interacting hardware and software components, " in Proc. 29th Des. Automat. Conf., June 1992, pp. 225--230.

....For a discussion of the constraint analysis the reader is referred to [13] The system graph model is partitioned based on feasibility of the overall system implementation and satisfaction of applicable data rate constraints. One such scheme relies on identifying unbounded delay operations[ 1, 14]. As a result of system partitioning, we have a set of concurrently executing hardware and software models. These models consist of hierarchical acyclic system graph models. We consider input output operations related to message passing and data dependent loops to be unbounded delay ....

....high system throughput. Differences in rates of computation causes variation in the rates of communication across different models. In order to facilitate this form of distributed computation, appropriate buffering and handshake mechanisms between hardware and software components are needed [14]. The software graph models are then serialized to minimize temporary register storage requirements.From the serialized graph models, we generate a corresponding C code description. The C code is then compiled into assembly code for the target processor using existing software compilers. We ....

[Article contains additional citation context not shown here]

R. K. Gupta, C. Coelho, and G. D. Micheli, "Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components," in Proceedings of the 29Design Automation Conference, pp. 225-230, June 1992.

....of threads over time, however, depends on control and data transfers, and thus a control data driven scheduler is used in the software that allows both software and hardware to schedule threads over time. For further information on this control data driven scheduler, we refer the reader to [8, 9]. We also assume that threads will execute in a general purpose microprocessor with a single level memory hierarchy. The hardware is synthesized using synthesis tools capable of scheduling operations over time, and allocating and binding resources and registers [13] We assume here that the ....

R. K. Gupta, C. N. Coelho Jr., and G. De Micheli. Synthesis and simulation of digital systems containing interacting hardware and software components. In Proceedings of the 29 thDesign Automa- tion Conference, pages 225 230, June 1992.

No context found.

GUPTA,R.K.,COELHO,C.N.,AND MICHELI, G. D. Synthesis and simulation of digital systems containing interacting hardware and software components. In Proc. of the 29th Design Automation Conference (DAC '92) (Anaheim, CA, June 1992).

No context found.

R.K. Gupta, C. Coelho, and G. De Micheli. Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components. In 29th ACM, IEEE Design Automation Conference, pages 225--230, 1992.

No context found.

R.K. Gupta, C. Coelho, and G. De Micheli, "Synthesis and simulation of digital systems containing interacting hardware and software components", In the 29th Design Automation Conference, June 1992.

No context found.

R. K. Gupta, C. N. C. Jr, and G. D. Micheli. Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components. In Proceedings of the Design Automation Conference, June 1992.

No context found.

R.K. Gupta, C. N. Coelho and G. de Michelli, Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components, Proceedings of the IEEE Design Automation Conference, pp. 225-230, June 1992.

No context found.

GUPTA,R.K.,COELHO,C.N.,AND MICHELI, G. D. Synthesis and simulation of digital systems containing interacting hardware and software components. In Proc. of the 29th Design Automation Conference (DAC '92) (Anaheim, CA, June 1992).

No context found.

R. K. Gupta, C. N. Coelho Jr., and G. De Micheli. Synthesis and simulation of digital systems containing interacting hardware and software components. In Proceedings of the Design Automation Conference, June 1992.

No context found.

R. K. Gupta, C. N. Coelho Jr., G. De Micheli. "Synthesis and simulation of digital systems containing interacting hardware and software components". In Proceedings of the 29th ACM, IEEE Design Automation Conference, 1992.

No context found.

R. Gupta, C. Coelho., G. De Micheli. "Synthesis and simulation of digital systems containing interacting hardware and software components". In Proceedings of the 29th ACM, IEEE Design Automation Conference, 1992.

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