J. S. Sun and R. W. Brodersen, "Design of system interface modules," in Proc. Int. Conf. Computer-Aided Design, Nov. 1992, pp. 478--481.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....Another thing that these approaches have in common is the attempt to hide the interface protocols from the designer. Instead a proper interface between two incompatible interfaces is either a) selected from a library or b) generated from the descriptions of the interfaces of the two IP blocks. In [36], Sun and Brodersen presents a method for designing system interface modules. The behaviour of the interface protocol is described in a high level specification language called IDL. The description is then passed to the ALOHA interface generator which generates an event graph. The event graph is ....

J. S. Sun, R. W. Brodersen, "Design of System Interface Modules", In Proc. of the International Conference on Computer-Aided Design (ICCAD), pp 478-481, 1992.

....in the form of parameters such as arbitration priorities, block transfer sizes, etc. Choosing appropriate values for these parameters can significantly impact the latency and transfer bandwidth associated with inter component communication. Finally, there is a body of work on interface synthesis [16, 17, 18, 19, 20, 21, 22, 23], which deals with automatically generating efficient hardware implementations for component to bus or component to component interfaces. These techniques address issues in the implementation of specified protocols, and not in the customization of the protocols themselves. In summary, we believe ....

J. S. Sun and R. W. Brodersen, "Design of system interface modules," in Proc. Int. Conf. ComputerAided Design, pp. 478--481, Nov. 1992.

....etc. usedbythechannels buses in the selected topology. The VSI Alliance on chip bus working group [14] has recognized that a multitude of bus protocols will be needed in order to serve the wide range of SOC communication requirements. Finally, there is a body of work on interface synthesis [15, 16, 17, 18, 19, 20, 21, 22], which deals with automatically generating efficient hardware implementations for component to bus or component to component interfaces. These techniques address issues in the implementation of specified protocols, and not in the customization of the protocols themselves. In summary, we believe ....

J. S. Sun and R. W. Brodersen, "Design of system interface modules," in Proc. Int. Conf. Computer-Aided Design, pp. 478--481, Nov. 1992.

....a component, a designer needs to manually instantiate it in the input description, meaning that its reuse is not automatically achieved. Both CADDY II and AMICAL do not consider how to capture a pre designed complex components with arbitrary I O protocols and determined timing constraints. ALOHA [8] proposed a strategy to capture I O signaling protocols of hardware modules with an event graph to support automatic generation of interface between interacting modules from a high level specification. However, their method does not support automatic component selection during synthesis. On the ....

J. S. Sun and R. W. Brodersen, "Design of system interface modules," Proc. ICCAD, 1992.

....up. Alternatively, a bus may be flexible, in which case the best width and protocol must still be determined; algorithms and techniques have been reported in [37] 38] After determining the protocol to meet design constraints, structure can be created for the protocol using techniques in [39] [41]. GAJSKI et al. SPECSYN: AN ENVIRONMENT SUPPORTING THE SER PARADIGM 95 Fig. 15. Refined fuzzy logic controller VHDL partial specification. B. Memories Another task is memory refinement associated with the implementation of variables assigned to memories. The variable accesses must be replaced ....

J. S. Sun and R. W. Brodersen, "Design of system interface modules," in Proc. Int. Conf. Computer-Aided Design, 1992, pp. 478--481.

....description languages. Conversely, methods to implement hardware speci cations in software have been proposed (e.g. GJM94] Str92] Some research has focused on particular aspects of hardware software cooperation, such as design of interfaces between hardware and software components (e.g. SB92] COB92] or formal speci cation of hardware software system properties (e.g. MKP92] Our formalism, the Co design Finite State Machine (CFSM) is an extension of classical Finite State Machines. It is equally expressive for hardware or software implementations of control dominated machines. ....

J. Sun and R. W. Brodersen. Design of system interface modules. In Proceedings of the International Conference on Computer-Aided Design, pages 478-481, November 1992.

....in the form of parameters such as arbitration priorities, transfer block sizes, etc. Choosing appropriate values for these parameters can significantly impact the latency and transfer bandwidth associated with inter component communication. Finally, there is a body of work on interface synthesis [16, 17, 18, 19, 20, 21, 22, 23], which deals with automatically generating efficient hardware implementations for component to bus or component to component interfaces. These techniques address issues in the implementation of specified protocols, and not in the customization of the protocols themselves. In summary, we believe ....

J. S. Sun and R. W. Brodersen, "Design of system interface modules," in Proc. Int. Conf. Computer-Aided Design, pp. 478--481, Nov. 1992.

.... event based specification languages (such as the event graphs of [Borriello 88b] At the University of California at Berkeley, OEsim has been used to represent and simulate the abstract interfaces of complex components that are interconnected on a printed circuit board or multi chip module (see [Sun Brodersen 92] A modified form of our restricted event logic has also been incorporated (see [Ortega 92] into the heterogenous simulation framework of Ptolemy [Buck et al. 91] to support the specification and checking of timing constraints when working within its event driven simulation domain. We have not ....

J. S. Sun and R. W. Brodersen. Design of system interface modules. In IEEE International Conference on Computer-Aided Design (ICCAD), November 1992.

....the interface by hardware elements alone. A later work [6] extended this technique to include software implementations of the interface as well, through a manual partitioning of the interface functionalities into hardware and software implementable partitions. This issue has also been addressed in [7]. In embedded systems, events are either polled by software or treated as interrupts to the normal processing of the microcontroller. In the latter case, the interrupt service code (ISC) generates the necessary response to the incoming event. In many cases, the interrupt method is the preferred ....

J. S. Sun and R. W. Brodersen, "Design of system interface modules," in Proc. Intl. Conf. on CAD (ICCAD-92), pp. 478--481, 1992.

....produce sub optimal results [58] 2. Boolean minimization based methods, on the other hand, derive a Boolean function for each interface output signal from the State Graph, and use various techniques and delay models in order to implement that function without hazards [15, 42, 1, 39] Sun et al. [56] and Lin et al. 44] proposed techniques to derive asynchronous interface specifications from a description of the protocols followed by the two partners. The basic idea (as initially developed by Borriello [6] is to match the data transfer parts of the protocol (since data transfer is generally ....

....if their utilization times are non overlapping. 2.3.4 The SIERA system The SIERA system [55] focuses on the problem of system level synthesis for printed circuit board designs consisting of multiple processors, ASICs, and FPGAs. It is fully integrated with the ALOHA interface synthesis tool [56] mentioned previously. A key aspect of SIERA is its use of parameterizable library components for hardware module generation. The library includes memory subsystems, embedded computer modules, bus interface modules, etc. The library elements can be defined in a hierarchical manner so that ....

Jane S. Sun and Robert W. Brodersen. Design of system interface modules. In Proceedings of the International Conference on Computer Aided Design, pages 478--481, November 1992.

....modules with incompatible protocols have been proposed in the past. Notable among these is the transducer synthesis approach by Borriello [1] in which glue logic (also known as the transducer) is automatically generated for two incompatible protocols specified as timing waveforms. Sun s work [7] on generating interface modules used techniques similar to Borriello s; however, it raised the design abstraction level by allowing the modules to be specified using the IDL specification language instead of using waveforms. The IDL specification was manually translated to VHDL for purposes of ....

Jane Sun and Robert Broderson. Design of system interface modules. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 478--481, 1992.

....languages. 2. Methods to implement hardware specifications in software (e.g. WWD92] GJM92c, GJM92b, GJM92a] Str92] 3. Methods to solve various particular aspects of hardware software cooperation; for example: ffl design of interfaces between hardware and software components ( SB92] COB92] ffl formal specification of hardware software system properties ( MKP92] None of the above mentioned approaches, though, has yet addressed, in our opinion, the problem of defining a formal model that is high level enough to be used as an intermediate representation ....

J. Sun and R. W. Brodersen. Design of system interface modules. In Proceedings of the International Conference on Computer-Aided Design, pages 478--481, November 1992.

....looked up. Alternatively, a bus may be flexible, in which case the best width and protocol must still be determined; algorithms and techniques have been reported in [37, 38] After determining the protocol to meet design constraints, structure can be created for the protocol using techniques in [39, 40, 41]. 4.2 Memories Another task is memory refinement associated with the implementation of variables assigned to memories. The variable accesses must be replaced by references to the corresponding memory locations. 4.3 Arbitration A third task, arbiter generation, inserts an arbiter behavior where ....

J. Sun and R. Brodersen, "Design of system interface modules," in Proceedings of the International Conference on Computer-Aided Design, pp. 478--481, 1992.

....description languages. Conversely, methods to implement hardware specifications in software have been proposed (e.g. GJM94] Str92] Some research has focused on particular aspects of hardware software cooperation, such as design of interfaces between hardware and software components (e.g. SB92] COB92] or formal specification of hardware software system properties (e.g. MKP92] Our formalism, the Co design Finite State Machine (CFSM) is an extension of classical Finite State Machines. It is equally expressive for hardware or software implementations of control dominated machines. ....

J. Sun and R. W. Brodersen. Design of system interface modules. In Proceedings of the International Conference on Computer-Aided Design, pages 478--481, November 1992.

....correct synchronization and data sequencing. The limitation of this approach is that the two protocols should be made compatible by manually assigning labels to the data on both sides, since the specification of the protocols is given at a very low level of abstraction using waveforms. Jane Sun [13] extends the approach by providing a library of components that frees the user from considering lower level details, but doesn t solve the problem we mentioned. A different approach is that taken by Gajski et al. 8] first, the protocol specification is reduced to the combination of five basic ....

J. S. Sun and R. W. Brodersen. Design of system interface modules. In Proceedings of International Conference on Computer Aided Design, pages 478--481, 1992.

....(such hardware is called a transducer) There are several techniques developed that address the problems of interfacing. In [57, 58] techniques for specifying protocols are described that extend traditional timing diagrams. In [59, 60] techniques are described for creating transducers. In [61, 62], an approach is introduced in which the detailed I O structure and protocols of library modules are hidden from a designer, who can simply interconnect those modules using high level primitives. Interface controllers are then synthesized automatically to permit communication between modules. ....

J. Sun and R. Brodersen, "Design of system interface modules," in Proceedings of the International Conference on Computer-Aided Design, pp. 478--481, 1992.

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J. S. Sun and R. W. Brodersen, "Design of system interface modules," in Proc. Int. Conf. Computer-Aided Design, Nov. 1992, pp. 478--481.

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J. Sun and R. Brodersen, "Design of System Interface Modules, " in Proc. of International Conference on Computer-Aided Design, 1992, pp. 478--481.

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J. Sun, R.W. Brodersen, "Design of System Interface Modules", Submitted to ICCAD-92.

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