W. H. Wolf, "Hardware--software co-design of embedded systems," Proc. IEEE, vol. 82, pp. 967--989, July 1994.  Home/Search   Document Not in Database   Summary   Related Articles   Check

.... and executable specification (Chapter 3 and 4) The transformational design refinement approach described in chapter 5 where the specification model is refined into a more detailed implementation model, should belong to the domain of co synthesis, but is not covered by the definition of Wolf [114] where co synthesis includes four different tasks: Partitioning The functionality of the system is divided into smaller, interacting computation units. Allocation The decision, which computational resources are used to implement the functionality of the system. Scheduling If several system ....

W. H. Wolf. Hardware-software co-design of embedded systems. Proceedings of the IEEE, 82(7):967--989, July 1994.

....could lead to a catastrophe. Therefore, guaranteeing that a real time embedded system meets all its timing constraints is a key issue in designing such a system. Many industrial examples show that the system level design plays a dominating role in determining the performance of a final product [14]. Hence, a major effort at the system level design is to identify from alternative architectures the best design which satisfies the timing constraints. Many algorithms for predicting the timing performance of a realtime embedded systems exist [14, 6 9, 13] A classical paper by Liu and Layland ....

....in determining the performance of a final product [14] Hence, a major effort at the system level design is to identify from alternative architectures the best design which satisfies the timing constraints. Many algorithms for predicting the timing performance of a realtime embedded systems exist [14, 6 9, 13]. A classical paper by Liu and Layland [9] presented an upper bound on the overall processor utilization in order for each independent periodic task to complete on or before its deadline. Lehoczky et al. 6] extended the result by characterizing the exact behavior of each task meeting its timing ....

W. Wolf "Hardware-software co-design of embedded systems", Proceeding of the IEEE, vol 82, No7,page 967-989, July 1994.

....work in this field targets embedded systems [11] Hardware software co synthesis is the automated design of a hardwaresoftware computer system. Hardware software co synthesis algorithms generally target embedded systems. A number of authors have surveyed the co design and co synthesis fields [12] [18]. Although our work relies on and draws from, or advances, research in numerous fields (e.g. asynchronous design, computer graphics, evolutionary algorithms, interface synthesis, physical design, real time operating systems, reconfigurable computing, scheduling, simulated annealing, wireless ....

W. H. Wolf, "Hardware-software co-design of embedded systems," Proc. of IEEE, vol. 82, pp. 967--989, July 1994.

....way of designing networks with possibly arbitrary topology is gaining importance. In addition to the system level, specialized network design is also becoming increasingly important at the onchip level [1] Many embedded systems consist of one or more application specific integrated circuits [2], designed for a single or narrow set of applications with highly characterizable (i.e. well behaved) communication. Encryption systems based on bit permutation, for example, may benefit from specially designed networks [3] Many researchers are working on automatic synthesis of such systems on a ....

W.H. Wolf. "Hardware-software Codesign of Embedded Systems ". Proc. of IEEE, 82(7):967--989, July 1994.

....are extremely important in designing complex SOCs comprising processor cores and dedicated ASIC modules. Processor speeds globally and performance predictability locally are important design trade off characteristics taken into account in building such a hardware software co design system [6]. A fundamental issue is the partitioning problem of system functionality between hardware and software. While shifting as much as possible of the functionality onto software reduces system cost and time to market, performance and power consumption suffer, thus diminishing the advantages of ....

W. H. Wolf, "Hardware-Software Co-Design of Embedded Systems", Proceedings of the IEEE, vol. 82, n. 7, pp. 967-- 989, July 1992.

....partitioning is to search for an assignment of system tasks to hardware modules which not only satisfies the constraint (such as timing) but also optimizes desired quality metrics, such as cost, power, and so on. This type of constrained optimization problem has been shown to be NP hard [14]. In hardware software partitioning both tasks and hardware modules can have different granularities. Coarse This research is supported in part by an External Research Program Grant from Hewlett Packard Laboratories, Bristol, England, by DARPA Army under contract number DABT63 97 C 0048, and ....

....3 describes the hierarchical evolutionary algorithm. Section 4 describes the preference driven technique. Finally, we present some experiment results of applying our algorithm. 2. Hierarchical Models And Our Approach The behavior of an embedded system is usually represented by a task graph [4, 14]. A task graph is a directed acyclic graph in which each node represents a task and each edge represents the data dependency between the tasks. As pointed out in the introduction, it is often desirable to allow a hierarchical representation of tasks. That is, a complex task may consist of several ....

W. H. Wolf. Hardware-software co-design of embedded systems. Proc. of the IEEE, 82(7):967--989, 1994.

....system like the one described in Section 2, several design problems emerge. There are, of course, the classical issues as selection of an architecture (e.g. number and kind of nodes) the mapping of tasks on the processing nodes, or the assignment of priorities to ET tasks and DYN messages [1] 7] [17]. However, due to the heterogeneous ET and TT nature of the application and the mixed synchronous dynamic bus protocol, some new, very interesting problems can be identified: Partitioning of the system functionality into TT and ET activities. During the design process, a decision should be made ....

W. Wolf, "Hardware-Software Co-Design of Embedded Systems", Proceedings of the IEEE, V82, N7, 1994.

....We prove that our conditions always outperform the existing respective conditions. Experimental results are also provided to compare our approach with known scheduling results. 1. INTRODUCTION A challenging issue in hardware software codesign is rapid design exploration at an early design phase [21, 5]. Since timing estimation must be performed for a large number of design alternatives, fast prediction of the system timing behavior is essential to the success of a design exploration tool. In this paper, we present an efficient method to predict the timing behavior of real time embedded system. ....

W. Wolf, "Hardware-software co-design of embedded systems," Proceedings of the IEEE, vol. 82, no. 7, pp. 967-989, July 1994.

....of this approach. 1 Introduction Codesign has emerged as a promising methodology for developing complex computer systems. Ideally, co design should allow designers to make decisions early in the development cycle regarding how tasks should be partitioned between hardware and software components [1, 2]. Equally impor tant is the ability to rapidly determine the performance resulting from a particular partition. Successful co design requires that specification, partitioning, and co verification all be appropriately adch essed. In this paper we will deal only with the partitioning issue one of ....

W. H. Wolf. Hardware-software co-design of embedded systems. Proc. IEEE, 82:967-989, 1994.

....This integration is a critical design issue in order to keep up with the complexity of a system. A good method to reduce the complexity of a system is to Divide et impera [Boc78] i.e. the system is partitioned into interacting subsystems. Partitioning can be applied to hard and software [Wol94]. To put these subsystems to work, they must communicate in terms of energy, matter, and information. Design of this communication system is a critical task and if the composition of the subsystems fails due to interface mismatches, the whole systems refuses to work even if each particular ....

W. H. Wolf. Hardware-Software Co-Design of Embedded Systems. Proceedings of the IEEE, 82(7):967--989, July 1994.

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W. H. Wolf, "Hardware--software co-design of embedded systems," Proc. IEEE, vol. 82, pp. 967--989, July 1994.

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W. H. Wolf. Hardware-software co-design of embedded systems. Proceedings of the IEEE, 82(7):967--989, July 1994.

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Wayne H.Wolf, "Hardware-Software Co-Design of Embedded Systems", Proceedings of IEEE. VOL 82 NO 7, July 1994.

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W. H. Wolf, "Hardware-Software Co-Design of Embedded Systems," Proceedings of the IEEE, V82, N7, 1994, pp. 967-989.

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WOLF, W. H. Hardware-softwareco-design of embeddedsystems. Proceedings of the IEEE 82, 7 (July 1994), 967--989.

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W. Wolf, "Hardware-software co-design of embedded systems", Proceedings of the IEEE, vol. 82, pp. 967-989, July 1994.

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W. Wolf, Hardware/Software Co-Design of Embedded Systems, Proceedings of the IEEE, Vol 82, No 7, pp 967-989, 1994.

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W. Wolf. Hardware-Software Co-Design of Embedded System. Proc. of the IEEE, Vol.82, No.7, pp967-989, 1994.

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W. Wolf. Hardware-Software Co-Design of Embedded System. Proc. of the IEEE, Vol.82, No.7, pp967-989, 1994.

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WOLF, W. H. Hardware-softwareco-design of embeddedsystems. Proceedings of the IEEE 82, 7 (July 1994), 967--989.

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W. H. Wolf. Hardware-software co-design of embedded systems. Proceedings of the IEEE, 82(7):967--989, July 1994.

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W. Wolf, "Hardware-Software Co-Design of Embedded Systems", Proceedings of the IEEE, V82, N7, 1994.

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W. Wolf, "Hardware-software co-design of embedded systems," Proc. IEEE, vol. 82, pp. 967--989, July 1994.

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W. Wolf, "Hardware-Software Co-Design of Embedded Systems", Proceedings of the IEEE, V82, N7, 1994.

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W.H. Wolf. Hardware-Software Co-Design of Embedded Systems. Proceedings of the IEEE, 82(7), July 1994. 5

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