K. Iwamura, T. Matsumoto, and H. Imai. Systolic-arrays for modular exponentiation using Montgomery method. In R. A. Rueppel, editor, Advances in Cryptology: Proceedings of EUROCRYPT'92, number 658 in Lecture Notes in Computer Science, pages 477--481. Springer-Verlag, 1992. Home/Search Document Not in Database Summary Related Articles Check |
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Hardware Implementation of Elliptic Curve Processor over GF(p) - Örs, Batina, Preneel (Correct)
....modular multiplication (MMM) in hardware was considered by many authors [7, 13, 33, 22, 17, 24, 34, 27, 14, 25, 28] A systolic array architecture is one possibility for implementations of public key cryptography in hardware. Various solutions for systolic arrays were proposed, for example [8, 12, 11, 32, 13, 15, 29, 35, 26, 3, 9, 31, 36, 4, 30, 2]. In this work we combine a systolic array architecture, which is assumed to be the best choice for hardware on current integrated circuits (ICs) with a MMM in Field Programmable Gate Array (FPGA) Similar work was done by Blum and Paar [3] However, their solution is less e#cient because they ....
K. Iwamura, T. Matsumoto, and H. Imai. Systolic-arrays for modular exponentiation using Montgomery method. In R. A. Rueppel, editor, Advances in Cryptology: Proceedings of EUROCRYPT'92, number 658 in Lecture Notes in Computer Science, pages 477--481. Springer-Verlag, 1992.
Hardware Implementation of a Montgomery Modular.. - Örs, Batina.. (Correct)
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K. Iwamura, T. Matsumoto, and H. Imai. Systolic-arrays for modular exponentiation using Montgomery method. In R. A. Rueppel, editor, Advances in Cryptology: Proceedings of EUROCRYPT'92, number 658 in Lecture Notes in Computer Science, pages 477--481. Springer-Verlag, 1992.
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