Neil Cohen, T.S. Sriram, Norm Leland, David Moyer, Steve Butler, and Robert Flatley. Soft error considerations for deep-submicron CMOS circuit applications. In IEEE International Electron Devices Meeting: Technical Digest, pages 315--318, December 1999. Home/Search Document Not in Database Summary Related Articles Check |
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Networks on Chip: A New Paradigm for Systems on Chip Design - Benini, De Micheli (2002) (1 citation) (Correct)
....dissipation which can make chip operation unfeasible or impractical. Energy considerations will impose small logic swings and power supplies, most likely below 1 Volt. Electrical noise due to cross talk, electromagnetic interference (EMI) and radiation induced charge injection (soft errors) [6] will be likely to produce additional timing errors or data errors. Regardless the source of errors, the end result is that the mere transmission of digital values on wires will be inherently unreliable [12] The distinguishing challenge for SoC design will be to provide adequate quality of ....
N. Cohen, T. Sriram, N. Leland, D. Moyer, S. Butler and R. Flatley, "Soft Error Considerations for Deep-Submicron CMOS Circuit Applications," IEDM, Proceedings of IEEE International Electron Device Meeting, pp. 315-318, 1999.
Efficient Resource Sharing in Concurrent Error.. - Smolens, Kim, Hoe.. (2004) (Correct)
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Neil Cohen, T.S. Sriram, Norm Leland, David Moyer, Steve Butler, and Robert Flatley. Soft error considerations for deep-submicron CMOS circuit applications. In IEEE International Electron Devices Meeting: Technical Digest, pages 315--318, December 1999.
Radiation-induced soft errors in digital circuits - A literature.. - Heijmen (2002) (Correct)
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N. Cohen, T.S. Sriram, N. Leland, D. Moyer, S. Butler, and R. Flatley. Soft error considerations for deep-submicron CMOS circuit applications. In Proc. IEEE Int. Dev. Meet. (IEDM), pages 315--318, 1999.
Defect Tolerant Probabilistic Design Paradigm for.. - Jacome, He, de.. (Correct)
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N. Cohen et al., "Soft error considerations for deep-submicron CMOS circuit applications," in IEEE International Electron Devices Meeting:Technical Digest, 1999, pp. 315--318.
Networks on Chips: a new paradigm for component-based MPSoC design - de Micheli (2004) (1 citation) (Correct)
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N. Cohen, T. Sriram, N. Leland, D. Moyer, S. Butler and R. Flatley, "Soft Error Considerations for DeepSubmicron CMOS Circuit Applications," IEDM, Proceedings of IEEE International Electron Device Meeting, pp. 315-318, 1999.
Input Ordering in Concurrent Checkers to Reduce Power.. - Mohanram, Touba (Correct)
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Cohen, N., Sriram, T. S., Leland, N., Moyer, D., Butler, S., and Flatley, R., "Soft error considerations for deep-submicron CMOS circuit applications," Intl. Electron Devices Meeting Technical Digest, 1999.
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