M.Srivastava, B.Brodersen, "Rapid prototyping of hardware and software in a unified framework", Proc. IEEE Int. Conf. Comp. Aided Design, Los Alamitos CA, pp.152-155, Nov. 1991.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....to complement performance or add functionality not achievable by pure program implementations. Recent advances in hardware synthesis and the proliferation of advanced and inexpensive microprocessors and processor cores have lead to the emergence of research interests in hardware software co design [4, 5,6,7,8,9,10]. Synthesis of systems containing re programmable components can be thought of as extension of highlevel synthesis techniques to systems containing generalized resources . However, due to differences in the computation model of the operations implemented in re programmable and ....

M. B. Srivastava and R. W. Broderson, "Rapid-Prototyping of Hardware and Software in a Unified Framework," in Proceedings of the IEEE International Conference on Computer-Aided Design, (Santa Clara), pp. 152-155, 1991.

....circuits; 11] describes a methodology for generation for hardware and software based on a unified FSM based model; given a system specification as a C program [12] identifies portions of the program that can be implemented into hardware in order to achieve a speedup of overall execution times. [13, 14] present frameworks for generation of hardware and software components of a system. Several new architectures have been proposed that use field programmable gate arrays to create special purpose co processors to speed up applications (PAM [15] MoM [16] or to create prototypes (QuickTurn [17] ....

M. B. Srivastava and R. W. Broderson, "Rapid-Prototyping of Hardware and Software in a Unified Framework," in Proceedings of the International Conference on Computer-Aided Design, (Santa Clara), pp. 152--155, 1991.

....in the design cycle. Thus, the most efficient implementation has a minimal amount of costly applicationspecific hardware while still meeting the required performance constraints. Several researchers have described frameworks for modeling, simulation and integration of software hardware designs [SB91][KL92] BV92] Software hardware partitioning techniques have been addressed in [GM92a] EH92] Gupta and De Micheli [GM92a] propose a partitioning algorithm that starts with an initial partition where all operations, except for the unbounded delay operations, are assigned to hardware. The partition ....

M.B. Srivastava, R. W. Brodersen, "Rapid-prototyping of hardware and software in a unified framework", ICCAD, Nov. 1991.

....and evaluation 5 Nam S. Woo et al. AT T Bell Labs Princeton University ) Codesign from Cospecification[6] A cospecification methodology 6 Mani B. Srivastava et al. University of California at Berkeley ) Rapid Prototyping of Hardware and Software in a Unified Framework[7] Handling of board level module generation, System software generation, and hardware integration in a unified framework 7 Kunle A. Olukotun et al. Stanford University ) A Software Hardware Cosynthesis Approach to Digital System Simulation[8] A cosynthesis approach to digital system ....

....further research to be done. Nevertheless, this research offers promising technology transfer from Software Engineering to Codesign. Paper No. 6 s main contribution was the handling of board level module generation, system software generation, and hardwaresoftware integration in a unified framework[7]. A simulation compiler in paper No. 7[8] can receive specification written in HDL and make software hardware partitioning and scheduling based on a simulation architecture. The aim of this partitioning algorithm is speedingup the execution time of whole system. Paper No. 9 brought forward a ....

Mani B. Srivastava and Robert W. Brodersen, "Rapid-Prototyping of Hardware and Software in a Unified Framework", Proc. Intl. Conf. Comp. Aided Design , IEEE Press, 1991, pp. 152-155.

....Thus, software blocks specified in programming language can be implemented in hardware, using an appropriate hardware synthesis path. Similarly, software routines can be synthesized from hardware blocks. Examples of co design systems that use heterogeneous specifications are Ptolemy [8] Siera [9] and CoWARE [10] Ptolemy is an environment and simulator for highly heterogeneous systems, Siera is a prototyping environment and CoWARE is a design system for embedded telecommunication applications. For example, CoWARE supports inputs in C, VHDL, and DFL [11] a data flow language) with VHDL ....

M. B. Srivastava and R. W. Broderson, "RapidPrototyping of Hardware and Software in a Unified Framework," Proceedings of the IEEE International Conference on Computer-Aided Design, pp. 152-155, 1991.

....interface [MD92] Hardware software system architectures The choice of a suitable architecture for hardware software systems is an open issue. The following publications list some of the architectures being pursued [SS93, BRV89, CvSRM91, CGH 93b, GK89, HHW89, HHR 91, HD92, PNRK93, SB91, SBB92, Wal90] System partitioning into hardware and software Choice of some architectures requires a suitable division of system functionality to be implemented in either hardware or software. Work in this area is still in infancy. Some techniques are proposed in [BRX93, GM92, HK93, IOJ94, ....

M. B. Srivastava and R. W. Broderson. Rapid-Prototyping of Hardware and Software in a Unified Framework. In Proceedings of the IEEE International Conference on Computer-Aided Design, pages 152--155, Santa Clara, 1991.

....not be necessary for the designer to re implement his algorithm from scratch while the algorithm only changes gradually. The CASTLE design environment presented in the next section was designed to comply with the properties listed above. Comparing these properties to related work by other authors [SB91,EH93,BR92,GC92] the properties 2, 5 and 7 have not been reported before and are therefore considered the highlights of our system. 3 Design flow and methodology Figure 1 shows the general design flow with CASTLE (Codesign And Synthesis TooL Environment) A designer models his system by an algorithmic ....

M.B. Srivastava and R.W. Brodersen, "Rapid Prototyping of Hardware and Software in a Unified Framework ", Proceedings of the International Conference on Computer Aided Design, pp. 152-155, 1991.

....required to handle highly pipelined or concurrent implementations must be taken into account. Others (e.g. Aco92] define it as the choice of the best processor bus memory architecture that suits a given software specification. We will use the term in a different sense (common, e.g. to [SB91] GJM92c, GJM92b, GJM92a] WWD92] meaning the design of a special purpose system composed of a few Application Specific Integrated Circuits cooperating with software procedures on general purpose processors. This restricted definition is still too wide to allow a useful formalization ....

....to relatively small real time control systems that are composed of software on one (or few) microcontrollers and some semi custom hardware components. We will exclude from our consideration large systems that require the coordination of many boards and tens of thousands of lines of code ( SB91] Coc92] Available approaches to this problem can be classified in three broad groups: 1. Methods to implement software programs in hardware; for example: ffl various flavors of CSP ( Hoa78] a formalism developed for correct concurrent program specification, have been translated ....

M. B. Srivastava and R. W. Brodersen. Rapid-prototyping of hardware and software in a unified framework. In Proceedings of the International Conference on ComputerAided Design, November 1991.

.... design either as a single chip or as an interconnection of multiple chips, each of which is individually synthesized [1] 2] 3] 4] attempts at system synthesis using both hardware and software components have been rare and limited to developing frameworks for facilitating the design process [5]. The problem of synthesis of mixed systems is fairly complex. There are many subproblems that must be solved before an effective synthesis system can be developed. Among the important issues are the problems of modeling of system functionality and constraints, determination of the boundary ....

M. B. Srivastava and R. W. Broderson, "Rapid-Prototyping of Hardware and Software in a Unified Framework," in Proceedings of the International Conference on Computer-Aided Design, (Santa Clara), pp. 152--155, 1991.

....and they are forced to reconvert their activities. Indeed, description, validation, synthesis, verification, and testing at system level must operate before the partitioning between hardware, firmware, and software takes place, to allow unconstrained exploration of alternatives [GCDM92] [SrBr91]. Hardware software codesign [CASH93] is an emerging issue. This work has been partially supported by the ESPRIT Working Group 6018 CHARME 2 and by the Italian CNR Progetto Speciale Specifiche ad Alto Livello e Verifica formale di Sistemi Digitali . Contact address: Paolo Prinetto, Dip. ....

M.B. Srivastava, R.W. Broderson: "Rapid prototyping of hardware and software in a unified framework," ICCAD-91: IEEE International Conference on Computer Aided Design, Santa Clara, CA (USA), November 1991, pp. 152-155

....for real time signal processing is described within the HYPERSPACE environment, which integrates a library of architecture specific compilers, partitioning, estimation, and performance analysis tools. Yet another design framework (SIERRA) for application specific systems is described in [28]. A high level description of the system as a network of processes is mapped to a system architecture template consisting of multiple boards using dedicated hardware modules and ASICs as well as software processes running on programmable hardware modules. In this work we address the problem of ....

M. B. Srivastava, "Rapid Prototyping of Hardware and Software in a Unified Framework", Ph.D. Thesis, University of California, Berkeley, CA, Memorandum No. UCB/ERL M92/67, June 1992.

....circuits; 11] describes a methodology for generation for hardware and software based on a unified FSM based model; given a system specification as a C program [12] identifies portions of the program that can be implemented into hardware in order to achieve a speedup of overall execution times. [13, 14] present frameworks for generation of hardware and software components of a system. Several new architectures have been proposed that use fieldprogrammable gate arrays to create special purpose co processors to speed up applications (PAM [15] MoM [16] or to create prototypes (QuickTurn [17] ....

M. B. Srivastava and R. W. Broderson, "Rapid-Prototyping of Hardware and Software in a Unified Framework," in Proceedings of the International Conference on Computer-Aided Design, (Santa Clara), pp. 152--155, 1991.

....systems are Lager IV [64] actually more of a silicon compiler than a high level synthesis system) Cathedral III [88, 87] hyper [28, 99] and phideo [70] 4.3.2 Systems: Board Level siera (Fig. 4. 2) is an integrated cad environment for the behavioral and physical design of dedicated systems [118, 113]. It extends the concepts of a vlsi silicon compiler to board level module generation. Board level components are produced using a mix of module generators and a module library. An interface generation module targets the automatic integration of these components into a higher level module, or the ....

M.B. Srivastava and R.W. Brodersen. "Rapid-Prototyping of Hardware and Software in a Unified Framework". In ICCAD, pages 152--155, Nov. 1991.

.... degli Abruzzi 24, I 10129 Torino (Italy) e mail Paolo.Prinetto polito.it tion, verification, and testing to take new issues into account, such as dealing with the system before partitioning between hardware, firmware, and software to allow an unconstrained exploration of alternatives [GCDM92] [SrBr91]. Hardware software codesign [CASH93] is, among the other, an emerging issue. Popular description formalisms such as HDLs intrinsically assume as their target objects hardware modules, therefore contradicting the above requirement. Software description formalisms are more suitable, being much more ....

M.B. Srivastava, R.W. Broderson: "Rapid prototyping of hardware and software in a unified framework," ICCAD-91: IEEE International Conference on Computer Aided Design, Santa Clara, CA (USA), November 1991, pp. 152-155

....the OMA board with real time I O. Currently, we feed the OMA board with data from a compact disc (CD) player and obtain data from it at CD rates. The OMA board is a 10 layer through hole PCB, with dimensions of 11 by 7 . It was designed and laid out using the tools developed here at UC Berkeley [9] and was fabricated by MOSIS. 4 RESULTS The 4 processor prototype has been tested and functional correctness has been verified. We have been able to achieve processor to processor to communication over the shared bus with a cost of 3 instruction cycles. The multiprocessor system has also been ....

M. B. Srivastava, "Rapid Prototyping of Hardware and Software in a Unified Framework", Ph.D. Thesis, ERL, UC Berkeley, June 1992.

....feedback of performance, size and cost metrics for a given distribution of functions on any allocation of processors, ASICs, memories and buses. Tools described in [26, 27] assist in mapping a specification onto a fixed allocation of one processor, one ASIC, one memory and one bus, while tools in [28, 29] assist in mapping onto a single processor with multiple ASICs. 3.2 Partitioning Given a functional specification and an allocation of system components, we need to partition the specification and assign each part to one of the allocated components. In fact, we can distinguish three types of ....

M. Srivastava and R. Brodersen, "Rapid-prototyping of hardware and software in a unified framework," in Proceedings of the International Conference on Computer-Aided Design, pp. 152--155, 1992.

No context found.

M.Srivastava, B.Brodersen, "Rapid prototyping of hardware and software in a unified framework", Proc. IEEE Int. Conf. Comp. Aided Design, Los Alamitos CA, pp.152-155, Nov. 1991.

No context found.

M.Srivastava, B.Brodersen, "Rapid prototyping of hardware and software in a unified framework", Proc. IEEE Int. Conf. Comp. Aided Design, Los Alamitos CA, pp.152-155, Nov. 1991.

No context found.

M. B. Srivastava and R. W. Broderson, "Rapid-prototyping of hardware and software in a unified framework," in Proc. ICCAD, 1991, pp. 152--155.

No context found.

SRI91 Srivastava, M. B. and Brodersen, R. W. Rapid-Prototyping of Hardware and Software in a Unified Framework. EECS Department, UC at Berkeley, 1991.

No context found.

M. Srivastava, R. Brodersen. "Rapid Prototyping of Hardware and Software in a Unified Framework", Proc. of the International Conference on ComputerAided Design, 1991.

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