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L. Chen, X. Bai and S. Dey, "Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores," in Proc. Design Automation Conf. (DAC'01), pp. 317-322, 2001.

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A Scalable Software-Based Self-Test Methodology for - Programmable Processors Li   Self-citation (Chen Dey)   (Correct)

....tester is used to load and unload the on chip memory. The use of a similar self test scheme has been recently reported on the Intel Pentium 4 processor [4] Applications of SBST to the testing of path delay faults, interconnect crosstalk faults, and fault diagnosis have been developed in [7][8][9] respectively. An enhancement of SBST using deterministic tests for arithmetic modules has been studied in [10] whereas [11] focuses on the application of SBST to processor control subsystems. SBST aims to generate high coverage tests that can be applied at speed using low cost testers. It ....

L. Chen, X. Bai, and S. Dey, "Testing for interconnect crosstalk defects using on-chip embedded processor cores," J. Electronic Testing: Theory and Applications, vol.18, (no.4), August 2002, pp. 529-538.


Multiple Transition Model and Enhanced Boundary Scan.. - Tehranipour Ahmed.. (2003)   (Correct)

No context found.

L. Chen, X. Bai and S. Dey, "Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores," in Proc. Design Automation Conf. (DAC'01), pp. 317-322, 2001.


Testing SoC Interconnects for Signal Integrity Using.. - Tehranipour, Ahmed.. (2003)   (Correct)

No context found.

L. Chen, X. Bai and S. Dey, "Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores," in Proc. Design Automation Conf. (DAC'01), pp. 317-322, 2001.


Testing SoC Interconnects for Signal Integrity Using.. - Tehranipour, Ahmed.. (2003)   (Correct)

No context found.

L. Chen, X. Bai and S. Dey, "Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores," in Proc. Desig Automation Conf. DAC'01), pp. 317-322, 2001.

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