ITRS Roadmap Committee. International technology roadmap for semiconductors. Technical Report, 2003. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Memory in Motion: A Study of Storage Structures in QCA - Frost, Rodrigues.. (2002) (1 citation) (Correct)
....formed recursively, rather than as conventional CMOS arrays, and hold the potential for extremely dense storage with embedded processing capabilities. 1. Introduction As computing components continue to shrink according to Moore s law, serious barriers to transistor based computing loom ahead [6]. Already dissipating heat from high performance high density CMOS components is a significant challenge, and one which will only become more difficult. The exponential increases in fabrication plant costs also endanger CMOS advancement. More threatening are the inherent physical constraints which ....
....allowing incredible densities compared to endof line CMOS technology. Assuming this cell spacing, the present 12 bit designs would exhibit densities of 218 cell bit and 324 cell bit, or between 24.12 and 4. 26 GBit cm ,a density which should be equaled by CMOS sometime in the next decade [6]. However, if one samples the density of just the memory loop of the H memory, the spiral architecture allows a density of only 18.75 cell bit or between 281.58 and 49.67 GBit cm , placing potential QCA densities well above those of CMOS (see figure 9) The performance of of the 12 bit ....
ITRS. International technology roadmap for semiconductors 2000.
On-Chip Interconnects for Next Generation System-on-Chips - Brinkmann, Niemann.. (2002) (Correct)
....from the IEEE. an area of for each bit, which scales with a factor of 3 . The scaling of the memory density does not only depend on the area reduction of the technology but also on a combination of different factors, like additional interconnect levels and a more efficient circuit layout [11]. On the basis of the overall number of modules in the system M sys the area for the lookup table A lookup is expressed through the following equation: A lookup = 2 (deg i )# (2) Each routing node has to be equipped with packet buffers for the avoidance of data loss due to traffic overload. ....
ITRS, "International Technology Roadmap for Semiconductors," 2001.
Dealing with Hardware Space Limits When Removing.. - Giraud, Lavenier (2005) (Correct)
No context found.
ITRS Roadmap Committee. International technology roadmap for semiconductors. Technical Report, 2003.
Models of Computation and Languages for Embedded System Design - Jantsch, Sander (2005) (Correct)
No context found.
ITRS Technology Working Group. International Technology Roadmap for Semiconductors - Design, 2003.
Bouncing Threads: Merging a new execution model into.. - Frost, Rodrigues.. (Correct)
No context found.
ITRS. International technology roadmap for semiconductors 2000.
Low-Cost Test For Core-Based System-On-A-Chip - Gonciari (2003) (Correct)
No context found.
ITRS, "The International Technology Roadmap for Semiconductors, 2001 Edition. " http://public.itrs.net/.
Efficient Seed Utilization for Reseeding based Compression - Erik Volkerink Subhasish (2003) (2 citations) (Correct)
No context found.
International Technology Roadmap for Semiconductors (ITRS), 1999.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC