E. Papadopoulou and D. Lee. Critical area computation via Voronoi diagrams. IEEE Transactions on Computer-Aided Design, 18(4):463--474, 1999. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
FedEx - A Fast Bridging Fault Extractor - Stanojevic, Walker (1 citation) (Correct)
....and intersected. The intersection area is the critical area. A common approximation is to assume a square defect and its associated orthogonal polygon expansion, as shown in Figure 3. Orthogonal expansions are relatively inexpensive. Another alternative is to use a Voronoi diagram of segments [14]. Another alternative is to use a circular defect and sample the layout with a Monte Carlo process to estimate the critical area. The drawback of a Monte Carlo procedure is that large sample sizes are required to ensure that faults with small critical area are identified for those applications ....
E. Papadopoulou and D. T. Lee, "Critical Area Computation Via Voronoi Diagrams", IEEE Trans. CAD, Vol. 18, April 1999.
Robustness of Algorithm for k-Gon Voronoi Diagram Construction - Chen, Papadopoulou, Xu Self-citation (Papadopoulou) (Correct)
No context found.
E. Papadopoulou and D. T. Lee, \Critical Area Computation via Voronoi Diagram," IEEE T rans. on Computer-Aided Design, 18:463-474, 1999.
The Min-Max Voronoi Diagram of Polygons and Applications .. - Evanthia Papadopoulou.. (2002) Self-citation (Papadopoulou) (Correct)
No context found.
E. Papadopoulou and D.T. Lee, \Critical Area Computation via Voronoi Diagrams ", IEEE Trans. on Computer-Aided Design, vol. 18, no.4, April 1999,463-474.
The L∞ Voronoi Diagram of Segments and VLSI Applications - Papadopoulou Self-citation (Papadopoulou) (Correct)
.... Extra material defects cause shorts between different conducting regions and represent the main reason for yield loss during manufacturing. For information on yield estimation and spot defects see for example Refs. 10,11,14,16,17,20,25,26,27] In this paper we generalize the result of Ref. [19] on critical area calculation to general layouts consisting of edges in arbitrary orientations. In particular, we use the proximity information preserved in the L1 Voronoi diagram of arbitrary shapes on a layer of a VLSI design and show that the critical area for shorts can be computed as a ....
....arbitrary orientations. In particular, we use the proximity information preserved in the L1 Voronoi diagram of arbitrary shapes on a layer of a VLSI design and show that the critical area for shorts can be computed as a function of the 2nd order L1 Voronoi diagram of shapes on that layer. In Ref. [19] the same result was shown for restricted ortho 45 layouts i.e. layouts consisting of shapes with edges in four orientations: horizontal, vertical and slope Sigma1. Applications of Voronoi diagrams in extracting from the physical description of a design the equivalent resistance are discussed ....
[Article contains additional citation context not shown here]
E. Papadopoulou and D.T. Lee, "Critical Area computation via Voronoi diagrams", IEEE Trans. on Computer-Aided Design, vol. 18, No. 4, April 1999, 463-474.
A Coarse Grained Parallel Algorithm - For Hausdorff Voronoi (Correct)
No context found.
E. Papadopoulou and D. Lee. Critical area computation via Voronoi diagrams. IEEE Transactions on Computer-Aided Design, 18(4):463--474, 1999.
A Coarse Grained Parallel Algorithm - For Hausdorff Voronoi (Correct)
No context found.
E. Papadopoulou and D. Lee. Critical area computation via Voronoi diagrams. IEEE Transactions on Computer-Aided Design, 18(4):463--474, 1999.
Robustness of Algorithm for k-Gon Voronoi Diagram Construction - Chen, Xu (2002) (Correct)
No context found.
E. Papadopoulou and D. T. Lee, \Critical Area Computation via Voronoi Diagram," IEEE T rans. on Computer-Aided Design, 18:463-474, 1999.
One Novel Approach toward Polyhedral Reconstruction on Spheres - Liu And Tan (2000) (Correct)
No context found.
Papadopoulou, E., Lee, D.T., "Critical area computation via Voronoi diagrams", IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 46, No. 3, pp. 463-474, 1999.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC