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L. Guerra et al., "Cycle and phase accurate DSP modeling and integration for HW/SW co-verification," in Proc. Design Automation Conf., June 1999, pp. 964--969.

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Design Methodology for Low Power Heterogeneous Reconfigurable.. - Wan (2001)   (Correct)

....it is necessary for the simulator to be written in a high level language so co verification with the rest of the system is possible. In addition, there is a trend of moving the system modeling and simulation technique away from the 53 pure RTL model in order to increase simulation speed. In [Gue99], it is shown that a C C model of DSP processors can achieve two to three order of magnitude speed improvement for core only simulation, and about one order of magnitude of improvement when bus and interrupt behaviors are modeled in C C . The improvement in simulation speed provides faster ....

L. Guerra, J. Fitzner, D. Talukdar, C. Schlager, B. Tabbara, V. Zivojnovic, "Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification", Design Automation Conference, 1999.


A Framework for Fast Hardware-Software Co-simulation - Hoffmann, Kogel, Meyr (2001)   (3 citations)  (Correct)

....interprets external events and generates cycle phase accurate simulation traces at the component s pins. For more complex architectures, though, employing heavy pipelining and interlocking mechanisms as recently seen in both the DSP and microcontroller area, this methodology is no more applicable [6]. Here, cycle and phase accurate simulators for cosimulation purposes are needed to cope with the problem 2 of instructions being split into smaller pieces and the associated interactions between the processor and other components across multiple cycles. Moreover, phase accurate models for any ....

L. Guerra, et al. Cycle and phase accurate DSP modeling and integration for HW/SW co-verification. In Proc. of the Design Automation Conference (DAC), Jun. 1999.


A Novel Methodology for the Design of.. - Hoffmann, Kogel.. (2001)   (3 citations)  (Correct)

No context found.

L. Guerra et al., "Cycle and phase accurate DSP modeling and integration for HW/SW co-verification," in Proc. Design Automation Conf., June 1999, pp. 964--969.


A System Level Processor/Communication.. - Wieferink, Kogel, .. (2004)   (1 citation)  (Correct)

No context found.

L. Guerra, J. Fitzner, D. Talukdar et al. Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification. In Proceedings of the Design Automation Conference (DAC), 1999.

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