C. J. Hughes, V. S. Pai, P. Ranganathan, S. V. Adve, RSIM: Simulating SharedMemory Multiprocessors with ILP Processors, IEEE Computer 35 (2) (2002) 40--49. Home/Search Document Not in Database Summary Related Articles Check |
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....applications suite [22] Mp3d and Water are from SPLASH benchmark suite [21] and SOR is from TreadMarks benchmark applications [9] The inputs used to generate the execution traces are also shown in Table 1. To collect execution traces, we ran each of these applications on RSIM 1. 0 simulator [8]. RSIM is an executiondriven simulator that models shared memory multiproces Pgm. Proc. Shared Mem. Barriers Locks Size (bytes) 2 3,220,200 14 0 FFT 4 3,228,904 14 0 8 3,295,528 14 0 2 526,220 4 0 LU 4 526,660 4 0 8 526,660 4 0 2 2,378,040 13 1,103 Mp3d 4 2,379,064 13 1,104 8 2,381,240 ....
C.J. Hughes, V.S. Pai, P. Ranganathan, and S.V. Adve. RSIM: Simulating shared-memory multiprocessors with ILP processors. IEEE Computer, 35(2), 2002.
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....the performance of different systems. On current stateof the art computer systems, several of the SPEC 1995 benchmark programs execute in less than one minute, for instance [2] In an effort to lead the rapid progress of computer systems, SPEC chose to dramatically increase Manuscript submitted 8 March 2002. Manuscript accepted 7 May 2002. Final manuscript received 17 May 2002. the runtimes of the new SPEC 2000 benchmark pro grams [7] as compared to the runtimes of the SPEC 1995 benchmark programs. In addition, several new bench marks were introduced to the suite to further extend its ....
....systems. On current stateof the art computer systems, several of the SPEC 1995 benchmark programs execute in less than one minute, for instance [2] In an effort to lead the rapid progress of computer systems, SPEC chose to dramatically increase Manuscript submitted 8 March 2002. Manuscript accepted 7 May 2002. Final manuscript received 17 May 2002. the runtimes of the new SPEC 2000 benchmark pro grams [7] as compared to the runtimes of the SPEC 1995 benchmark programs. In addition, several new bench marks were introduced to the suite to further extend its applicability to contemporary performance ....
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Christopher J. Hughes, Vijay S. Pai, Parthasarathy Ran- ganathan, and Sarita V. Adve. Rsim: Simulating sharedmemory multiprocessors with ILP processors. IEEE Computer, pages 40 49 February 2002.
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....Finally, since not all the 3 hop misses can be predicted, we also present results of a directory architecture optimized for 3 hop misses. 5. 1 Simulation Environment We have used a modified version of Rice Simulator for ILP Multiprocessors (RSIM) a detailed execution driven simulator [12]. RSIM models an out of order superscalar processor pipeline, a two level cache hierarchy, a splittransaction bus on each processor node, and an aggressive memory and multiprocessor interconnection network subsystem, including contention at all resources. The modeled system is a 16 node cc NUMA ....
C. J. Hughes, V. S. Pai, P. Ranganathan and S. V. Adve. "RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors". IEEE Computer, 35(2):40--49, February 2002.
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C. J. Hughes, V. S. Pai, P. Ranganathan, and S. V. Adve. RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors. IEEE Computer, February 2002.
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C. J. Hughes, V. S. Pai, P. Ranganathan, and S. V. Adve. RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors. IEEE Computer, February 2002.
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C. J. Hughes, V. S. Pai, P. Ranganathan, and S. V. Adve, "RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors," IEEE Computer, vol. 3, no. 2, Feb. 2002.
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C. J. Hughes, V. S. Pai, P. Ranganathan, and S. V. Adve. RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors. IEEE Computer, February 2002.
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....of di erent adaptations (adaptations that cannot be invoked on a full frame are inapplicable to the global algorithm while adaptations with high overhead and impacting execution time are inapplicable to local algorithms) 5. EXPERIMENTAL METHODOLOGY 5. 1 Systems Modeled We use the RSIM simulator [18] for performance evaluation and the Wattch tool [5] integrated with RSIM for energy measurement. The base processor studied is similar to the MIPS R10000 and is summarized in Table 2. We assume a centralized instruction window with a uni ed reorder bu er and issue queue but a separate physical ....
C. J. Hughes, V. S. Pai, P. Ranganathan, and S. V. Adve. RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors. IEEE Computer, February 2002.
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Hughes, C.J.; Pai, V.S.; Ranganathan, P. and Adve, S.V.: "Rsim: Simulating Shared-Memory Multiprocessors with ILP Processors ", IEEE Computer, February 2002, pp 44-49
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