W. H. Mangione-Smith and G. Memik, Network Processing: Applications', Architectures and Examples. Tutorial at International Symposium on Microarchitecture, Austin / TX. Dec. 2001.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....they are software programmable, they have flexibility comparable to general purpose processors. Their advantages over existing solutions made the NPU market one of the fastest growing segments of the microprocessor industry. Currently there are more than 40 companies with a variety of NPU designs [9]. Two important properties of networking applications are utilized by the NPU designers. First, these applications consume and produce well defined data segments (network packets) This property leads the designers to utilize intelligent memory controllers specifically designed to move packet ....

W. H. Mangione-Smith and G. Memik, Network Processing: Applications', Architectures and Examples. Tutorial at International Symposium on Microarchitecture, Austin / TX. Dec. 2001.

....are software programmable, they have the flexibility comparable to general purpose processors. Soon after their introduction [2, 10] the NPU market became one of the fastest growing segments of the microprocessor industry. Currently there are more than 30 companies with a variety of NPU designs [8]. demand new and more complex tasks to be performed efficiently in the processing elements. A significant portion of these new applications search or modify Layer 7 application payload information in the packet that was not accessed by the traditional network processing elements. In this paper, ....

Mangione-Smith, and W. H. and Memik, G. Network Processing: Applications, Architectures and Examples. Tutorial at International Symposium on Microarchitecture, Austin / TX, Dec. 2001.

....the engine, and d) conduct simulation experiments to evaluate the eftctiveness of our technique. Although our technique can be efficiently employed by a variety of multi processor systems, we concentrate on NPUs, because most of the NPUs follow the single chip multiprocessor design methodology [18] (e.g. Intel IXP 1200 [11] 7 execution cores) and IBM PowerNP [12] 17 execution cores) In addition, these chips consume significant power: IBM PowerNP [12] consumes 20W during typical operations, whereas C Port C 5 [7] consumes 15W. The multiple execution cores are often connected by a global ....

Mangione-Smith, W. H. and G. Memik, Network Processing: Applications, Architectures and Examples. Tutorial at International Symposium on Microarchitecture, Austin / TX. Dec. 2001.

....they are software programmable, they have flexibility comparable to general purpose processors. Their advantages over existing solutions made the NPU market one of the fastest growing segments of the microprocessor industry. Currently there are more than 40 companies with a variety of NPU designs [9]. Two important properties of networking applications are utilized by the NPU designers. First, these applications consume and produce well defined data segments (network packets) This property leads the designers to utilize intelligent memory controllers specifically designed to move packet ....

W. H. Mangione-Smith and G. Memik, Network Processing: Applications, Architectures and Examples. Tutorial at International Symposium on Microarchitecture, Austin / TX. Dec. 2001.

....Since they are software programmable, they have the flexibility of general purpose processors. Soon after their introduction [12] the NPU market became one of the fastest growing segments of the microprocessor industry. Currently there are more than 30 companies with a variety of NPU designs [10]. speeds demand new and more complex tasks to be performed efficiently in the processing elements. A significant portion of these new applications examine or modify Layer 7 application payload information in the packet that was not accessed by the traditional network processing elements. In this ....

Mangione-Smith, W.H. and G. Memik, Network Processing: Applications', Architectures and Examples. Tutorial at International Symposium on Microarchitecture, Austin / TX, Dec. 2001.

....and d) present simulation results showing the effectiveness of our technique. Although our technique can be efficiently employed by a variety of multi processor systems, we concentrate on Network Processors (NPUs) because most of the NPUs follow the single chip multiprocessor design methodology [16] (e.g. Intel IXP 1200 [10] 7 execution cores) and IBM PowerNP [12] 17 execution cores) In addition, these chips consume significant power: IBM PowerNP [12] consumes 20W during typical operations, whereas C Port C 5 [7] consumes 15W. The multiple execution cores are often connected by a global ....

Mangione-Smith, W. H. and G. Memik. Network Processing: Applications, Architectures and Examples. Tutorial at International Symposium on Microarchitecture, Austin / TX. Dec. 2001.

....1 58113 461 4 02 0006. 5.00. have the flexibility comparable to general purpose processors. Soon after their introduction [2, 10] the NPU market became one of the fastest growing segments of the microprocessor industry. Currently there are more than 30 companies with a variety of NPU designs [8]. demand new and more complex tasks to be performed efficiently in the processing elements. A significant portion of these new applications search or modify Layer 7 application payload information in the packet that was not accessed by the traditional network processing elements. In this paper, ....

Mangione-Smith, and W. H. and Memik, G. Network Processing: Applications, Architectures and Examples. Tutorial at International Symposium on Microarchitecture, Austin / TX, Dec. 2001.

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC