Cortadella, J., Kishinevsky, M., Kondratyev, A., Lavagno, L., Yakovlev, A.: Petrify: A Tool for Manipulating Concurrent Specifications and Synthesis of Asynchronous Controllers, IEICE Transactions on Information and Systems, 3(E80-D), 1997, 315--325. Home/Search Document Details and Download
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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI).. - Kenneth Stevens Senior (Correct)
....computer aided design (CAD) and methodology most suitable for aggressive timed asynchronous circuit design. Initial designs and methods were based on the CAD available at that time. The circuits were specified and synthesized using speed independent (SI) or burst mode (BM XBM) methodologies [2] [4] as well as metric timed circuit design [5] We quickly discovered that many of the circuits that achieved our performance goals contained some form of timing assumptions either the fundamental mode assumption of burst mode or gate level metric timing. The performance was improved by ....
....circuits in terms of area and energy. A more complete modeling of some of these circuits and parameters can be found in [29] The circuit examples in this paper contain static and domino gates normally employing a single pMOS device. Asynchronous tools such as ATACS [5] 3D [4] 30] and Petrify [2] can typically synthesize set reset flops and the appropriate functions [Fig. 1(a) We can often apply technology mapping into single variable reset (equivalently set) functions and implement them using standard footed domino gates as in Fig. 1(b) When the reset variable is not used in the set ....
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J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Petrify: A tool for manipulating concurrent specifications and synthesis of asynchronous controllers," IEICE Trans. Inform. Syst., vol. E80-D, no. 3, pp. 315--325, 1997.
Asynchronous Circuit Design via Automated Petri Net Generation - Dennis Furey And (Correct)
.... convenient for designers to create structured specifications in DISP of delay insensitive interfaces than to work directly with Petri nets, and that such specifications (after translation to Petri nets by di2pn) are amenable to automated analysis, transformation and logic synthesis using petrify [1]. The specification language DISP owes much to the ideas of process algebras, as the name implies, and may indeed lend itself directly to a trace based semantics, a subject briefly revisited in the conclusion. However, the primary focus of this paper is on the more straightforward and immediate ....
....for model CELL.eqn # Generated by 4. 2 (compiled Fri Jul 20 16:33:43 2001) # Outputs between brackets [out] indicate a feedback to input out # Estimated area = 66.00 INORDER = tC tB tA fC fB fA tS tD fS fD; OUTORDER = tS] tD] fS] fD] 0] tC (fB fA tB tA) fC (tB fA fB tA) [1] = fB tB tC ; tS] 1] 0] tS) tS [0] # mappable onto gC [3] tC (tB tS tA) tB tA; 4] tA (tC fA tS) tD] 4] 3] tD) tD [3] # mappable onto gC [6] tC (tB fA tA fB) fC (fB fA tB tA) 7] fB tB fC ; fS] 7] 6] fS) fS [6] # mappable ....
[Article contains additional citation context not shown here]
Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, and Alexandre Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. In XI Conference on Design of Integrated Circuits and Systems, Barcelona, November 1996.
Delay-Insensitive Interface Specification and Synthesis - Josephs, Furey (2000) (Correct)
....the possibilities of reordering and interference as those transitions are propagated along wires [19] Variants of Petri nets, such as I Nets [15] Signal Transition Graphs [2] or Change Diagrams [11] are popular formalisms for specifying dependences between signal transitions. The petrify tool [4] has been used successfully to synthesise asynchronous circuits from Petri nets. Asynchronous VLSI design teams at the University of Manchester and at Cogency Technology in the UK, and at the Technical University of Denmark, have made extensive use of the petrify tool. The Burst Mode approach, ....
J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. In XI Conference on Design of Integrated Circuits and Systems, Barcelona, Nov. 1996.
Logic Synthesis Avoiding State Space Explosion - Khomenko, Koutny, Yakovlev (2003) Self-citation (Yakovlev) (Correct)
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Cortadella, J., Kishinevsky, M., Kondratyev, A., Lavagno, L., Yakovlev, A.: Petrify: a Tool for Manipulating Concurrent Specifications and Synthesis of Asynchronous Controllers, IEICE Transactions on Information and Systems, E80-D(3), 1997, 315--325.
STG Optimisation in the Direct Mapping of Asynchronous.. - Sokolov Bystrov Yakovlev (2003) Self-citation (Yakovlev) (Correct)
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J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. In XI Conference on Design of Integrated Circuits and Systems, Barcelona, Spain, Nov. 1996.
Logic Synthesis Avoiding State Space Explosion - Khomenko, Koutny, Yakovlev Self-citation (Yakovlev) (Correct)
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Cortadella, J., Kishinevsky, M., Kondratyev, A., Lavagno, L., Yakovlev, A.: Petrify: a Tool for Manipulating Concurrent Specifications and Synthesis of Asynchronous Controllers, IEICE Transactions on Information and Systems, E80-D(3), 1997, 315--325.
Lazy Transition Systems and Asynchronous Circuit.. - Cortadella.. (2002) Self-citation (Cortadella Kishinevsky Kondratyev Lavagno Yakovlev) (Correct)
....the correctness of the circuit. Keywords Asynchronous circuits, lazy transition systems, relative timing, logic synthesis. I. Introduction During the last decade, there has been significant progress in developing methods and tools for asynchronous circuit synthesis [1] 2] 3] 4] [5]. The two chief directions in this work have been following two synthesis approaches, one based on the Huffman s state machine model [6] 7] and the other deriving from Muller s concept of speed independent circuit [8] The former, also known as fundamental mode circuit design, makes strong ....
....CA 94086 USA L. Lavagno is with the DIEGM, Universit a di Udine, Italy. A. Yakovlev is with the Department of Computing Science. University of Newcastle upon Tyne, UK. is called input output (IO) mode. The recently developed design methods and software based on Signal Transition Graphs (STGs) [5], 11] exemplify this approach, and produce speed independent circuits, whose behavior is invariant to delays in gates but may be sensitive to wire delays. The synthesis techniques described in this paper are an attempt to combine the expressive power of Signal Transition Graphs (that allow a ....
[Article contains additional citation context not shown here]
J. Cortadella, M. Kishinevsky, A.Kondratyev, L. Lavagno, and A. Yakovlev, "Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers," IEICE Transactions on Information and Systems, vol. E80-D, no. 3, pp. 315--325, Mar. 1997.
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Cortadella, J., Kishinevsky, M., Kondratyev, A., Lavagno, L., Yakovlev, A.: Petrify: A Tool for Manipulating Concurrent Specifications and Synthesis of Asynchronous Controllers, IEICE Transactions on Information and Systems, 3(E80-D), 1997, 315--325.
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J. Cortadella M. Kishinevsky A. Kondratyev L. Lavagno and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. In IEICE Transactions on Infromation and Systems,volume E80-D(3), pages 315--325, 1997.
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Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, and Alexandre Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. In XI Conference on Design of Integrated Circuits and Systems, Barcelona, November 1996.
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J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Petrify: A Tool for Manipulating Concurrent Specifications and Synthesis of Asynchronous Controllers," Departament d'Arquitectura de Computadors, Universitat Politecnica de Catalunya, Tech. Rep., 1996.
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J. Cortadella M. Kishinevsky A. Kondratyev L. Lavagno and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. In IEICE Transactions on Infromation and Systems,volume E80-D(3), pages 315--325, 1997.
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Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, and Alexandre Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. In XI Conference on Design of Integrated Circuits and Systems, Barcelona, November 1996.
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J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. IEICE Trans. on Information and Systems, E80-D(3):315--325, 1997.
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J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. IEICE Transactions on Information and Systems, E80-D(3):315--325, March 1997.
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J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Petrify: A tool for manipulating concurrent specifications and synthesis of asynchronous controllers," IEICE Trans. Inf. & Syst., vol.E80-D, no.3, pp.315-325, Mar. 1997.
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J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. IEICE Transactions on Information and Systems, E80-D(3):315-- 325, March 1997. 4
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Cortadella, J., Kishinevsky, M., Kondratyev, A., Lavagno, L., Yakovlev, A. "Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers" IEICE Transactions on Information and Systems, Vol. E80-D, No. 3, March 1997, pp. 315-325.
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J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. IEICE Transactions on Information and Systems, E80-D(3):315--325, 1997.
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J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. IEICE Trans. on Information and Systems, Vol. E80-D, No. 3, pp. 315-325, Mar. 1997.
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J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. In IEICE Trans. on Information & Systems, vol. E80-D(3), pp. 315--325, 1997. 33
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