R. Sinnappan and S. Hazelhurst, "A Reconfigurable Approach to Packet Filtering, "In Proceedings of FPL 2001: 11th International Conference on Field Programmable Logic and Applications, Belfast, United Kingdom, August 2001.  Home/Search   Document Not in Database   Summary   Related Articles

....FPGA tools allow quick extraction of realistic performance and resource costs. 1. 2 Related Work Research in reconfigurable network hardware assess the possibility of using re configurable hardware as a network processors [12] switches [13] routers [14, 15] and network protocol wrappers [16 19]. Projects such as PLATO of Technical University of Crete [13] and FPX of Washington University are reconfigurable network hardware design platform on which above application can be configured [14, 15, 171 . Reconfigurable packet filtering projects mentioned above are pattern matching units that ....

....projects mentioned above are pattern matching units that make decision based on TCP and IP header information. Like most ASIC packet classification co processors, the FPGA is configured to function as a co processor to reduce the processing time for packet classification in few re search projects [18, 19]. The reconfigurable nature of the FPGA adds additional flexibility in filtering mechanisms compared to ASIC solutions. Firewalls which are limited to header processing can only partially satisfy the inspection requirements involved in deep packet search process. In deep packet search algorithm, ....

R. Sinnappan and S. Hazelhurst, "A Reconfigurable Approach to Packet Filtering, "In Proceedings of FPL 2001: 11th International Conference on Field Programmable Logic and Applications, Belfast, United Kingdom, August 2001.

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