J. J. Navarro, E. Garc ia, J. L. Larriba-Pey, and T. Juan. Algorithms for sparse matrix computations on high-performance workstations. In Proceedings of the 10th ACM International Conference on Supercomputing, pages 301--308, Philadelpha, PA, USA, May 1996. Home/Search Document Not in Database Summary Related Articles Check |
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Automatic Performance Tuning and Analysis of Sparse .. - Vuduc, Kamil, Hsu, .. (2002) (Correct)
....implementations approaches upper bounds on a variety of architectures, suggesting that additional gains from low level tuning (e.g. instruction scheduling) will be limited. Instead we are examining other algorithmic ways of improving reuse, for instance, via the use of multiple right hand sides [29, 16, 22]. Preliminary results on Itanium for sparse matrix multiple vector mltiplication show speedups of 6.5 to 9 over single vector code [40] Register blocking with square blocks on a uniformly aligned grid appears to be too limiting to see appreciable performance benefits. Encouraged by the gains ....
J. J. Navarro, E. Garc ia, J. L. Larriba-Pey, and T. Juan. Algorithms for sparse matrix computations on high-performance workstations. In Proceedings of the 10th ACM International Conference on Supercomputing, pages 301--308, Philadelpha, PA, USA, May 1996.
Performance Optimizations and Bounds for Sparse.. - Vuduc, Demmel.. (2002) (4 citations) (Correct)
....twice. Our preliminary results indicate that we can go significantly faster, up to a factor of 2. Fourth, we can identify and tune higher level sparse kernels that also permit more matrix reuse. An example is applying register blocking to sparse matrix multiple vector multiplication (SpMM) [23, 10, 17]. This kernel can be exploited in iterative solvers with multiple right hand sides and also in block eigensolvers. On the Itanium and Ultra 2i we have observed speedups of up to 6.5 and 9 times that of SpMM with a single right hand side. Another example is computing A Ax, which is used in ....
J. J. Navarro, E. Garc ia, J. L. Larriba-Pey, and T. Juan. Algorithms for sparse matrix computations on high-performance workstations. In Proceedings of the 10th ACM International Conference on Supercomputing, pages 301--308, Philadelpha, PA, USA, May 1996.
Automatic Performance Tuning and Analysis of Sparse .. - Vuduc, Kamil, Hsu, .. (2002) (Correct)
No context found.
J. J. Navarro, E. Garc ia, J. L. Larriba-Pey, and T. Juan. Algorithms for sparse matrix computations on high-performance workstations. In Proceedings of the 10th ACM International Conference on Supercomputing, pages 301--308, Philadelpha, PA, USA, May 1996.
Performance Tuning and Analysis of Sparse Triangular Solve .. - Richie Bebop Computer (2002) (Correct)
No context found.
J. J. Navarro, E. Garc ia, J. L. Larriba-Pey, and T. Juan. Algorithms for sparse matrix computations on high-performance workstations. In Proceedings of the 10th ACM International Conference on Supercomputing, pages 301--308, Philadelpha, PA, USA, May 1996.
Performance Optimizations and Bounds for Sparse.. - Vuduc, Demmel, Yelick (2002) (4 citations) (Correct)
No context found.
J. J. Navarro, E. Garc ia, J. L. Larriba-Pey, and T. Juan. Algorithms for sparse matrix computations on high-performance workstations. In Proceedings of the 10th ACM International Conference on Supercomputing, pages 301--308, Philadelpha, PA, USA, May 1996.
Memory Hierarchy Optimizations and Performance Bounds.. - Vuduc, Gyulassy.. (2003) (Correct)
No context found.
J. J. Navarro, E. Garc ia, J. L. Larriba-Pey, and T. Juan. Algorithms for sparse matrix computations on high-performance workstations. In Proceedings of the 10th ACM International Conference on Supercomputing, pages 301--308, Philadelpha, PA, USA, May 1996.
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