W. Grobman, M. Thompson, R. Wang, C. Yuan, R. Tian and E. Demircan, "Reticle Enhancement Technology: Implications and Challenges for Physical Design", Proc. Design Automation Conf., Las Vegas, 2001, pp. 73-78. Home/Search Document Details and Download
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Area Fill Synthesis for Uniform Layout Density - Chen, Kahng, Robins, Zelikovsky (2002) (Correct)
....certainly the fill geometries can affect interconnect capacitance, signal delay and crosstalk. The exact change in interconnect capacitance mainly depends on the size of the fill geometries and proximity to interconnect lines. However, Grobman et al. have recently given detailed experimental data [10] pointing out that We observe that the 1999 International Technology Roadmap for Semiconductors [22] added copper interconnect dishing to the fundamental roadmap parameters for Interconnect. The 2000 ITRS also added copper interconnect thinning in CMP to the fundamental parameters. ....
W. Grobman, M. Thompson, R. Wang, C. Yuan, R. Tian and E. Demircan, "Reticle Enhancement Technology: Implications and Challenges for Physical Design", Proc. Design Automation Conf., Las Vegas, 2001, pp. 73-78.
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