Isaac Keslassy and Nick McKeown. Maintaining packet order in two-stage switches. In IEEE INFOCOM, June 2002.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....output buffer, we show that the end to end delay for every packet of a guaranteed rate ow is bounded by the sum of its targeted departure time and a constant that only depends on the number of ows and the size of the switch. Our second scheme is a frame based scheme as in Keslassy and McKeown [18]. There, time slots are grouped into x size frames. Packets are placed in appropriate bins (buffers) according to their arrival times and their ows. We show that if the incoming traf c satis es certain assumptions, then the end to end delay for every packet and the size of the central buffers ....

....[25] However, load balancing via randomization does not yield deterministic bounds. The drawback of the load balanced Birkhoff von Neumann switch with multi stage buffering is its hardware implementation complexity for the resequencing and output buffer and the jitter control mechanism. In [18], Keslassy and McKeown developed a clever scheme that uses the Full Frame First (FFF) scheduling policy in the central buffers. In such a scheme, packets of the same ow at the central buffers are grouped into frames with frame size equal to the number of inputs. By so doing, packet of the same ....

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I. Keslassy and N. McKeown, Maintaining packet order in two-stage switches, Proc. of IEEE INFOCOM, New York, 2002.

....To allow variable length packets, one needs to introduce packetizers (see e.g. 2] for segmentation and reassembly. The bounds in [2] for packetizers might be used to extend the results in this paper to the case with variable length packets. iv) In the recent paper by Keslassy and McKeown [10], a full frame rst algorithm is proposed so that packets in the two stage switches can be departed in sequence. However, this is at the cost of communications between VOQs. It would be interesting to see if there are other scheduling algorithms that achieve the same objective with lower ....

I. Keslassy and N. McKeown, \Maintaining packet order in two-stage switches," preprint, 2001.

....One of the key challenges to build high speed packet switches that scale with the transmission speed of ber optics is to resolve con icts of packets competing for the same resource. There are two common approaches. The rst approach is to use electronic buffers (see e.g. 7] 14] 2] [16]) As the accessing speed of electronic memory is considerably slower than the speed of ber optics, this approach in general requires a lot of parallel buffers to achieve the needed speedup for ber optics. The other approach is to resolve con icts directly by optical Switches and ber Delay ....

I. Keslassy and N. McKeown, Maintaining packet order in two-stage switches, preprint, 2001.

....One of the key challenges to build high speed packet switches that scale with the transmission speed of fiber optics is to resolve conflicts of packets competing for the same resource. There are two common approaches. The first approach is to use electronic buffers (see e.g. 7] 14] 2] [16]) As the accessing speed of electronic memory is considerably slower than the speed of fiber optics, this approach in general requires a lot of parallel buffers to achieve the needed speedup for fiber optics. The other approach is to resolve conflicts directly by optical Switches and fiber Delay ....

I. Keslassy and N. McKeown, "Maintaining packet order in two-stage switches," preprint, 2001.

....output buffer, we show that the end to end delay for every packet of a guaranteed rate flow is bounded by the sum of its targeted departure time and a constant that only depends on the number of flows and the size of the switch. Our second scheme is a frame based scheme as in Keslassy and McKeown [18]. There, time slots are grouped into fix size frames. Packets are placed in appropriate bins (buffers) according to their arrival times and their flows. We show that if the incoming traffic satisfies certain assumptions, then the end to end delay for every packet and the size of the central ....

....[25] However, load balancing via randomization does not yield deterministic bounds. The drawback of the load balanced Birkhoff von Neumann switch with multi stage buffering is its hardware implementation complexity for the resequencing and output buffer and the jitter control mechanism. In [18], Keslassy and McKeown developed a clever scheme that uses the Full Frame First (FFF) scheduling policy in the central buffers. In such a scheme, packets of the same flow at the central buffers are grouped into frames with frame size equal to the number of inputs. By so doing, packet of the same ....

[Article contains additional citation context not shown here]

I. Keslassy and N. McKeown, "Maintaining packet order in two-stage switches," Proc. of IEEE INFOCOM, New York, 2002.

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I. Keslassy and N. McKeown, "Maintaining packet order in two-stage switches," IEEE Infocom, June 2002.

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I. Keslassy and N. McKeown, "Maintaining packet order in two-stage switches," Proc. of the IEEE Infocom, June 2002.

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I. Keslassy and N. McKeown, "Maintaining packet order in two-stage switches," Proc. of the IEEE Infocom, June 2002.

....tion flow. In its current version, TCP does not perform well when packets arrive to the destination out of order because they can trigger un necessary retransmissions. There are two approaches to preventing mis sequencing: To prevent packets from becoming mis sequenced anywhere in the router [24]; or to bound the amount of mis sequencing, and use a re sequencing buffer in the third stage [25] None of the schemes published to date would work in our 100Tb s router. The schemes use schedulers that are hard to implement at these speeds, need jitter control buffers that require N writes to ....

....the schemes published to date would work in our 100Tb s router. The schemes use schedulers that are hard to implement at these speeds, need jitter control buffers that require N writes to memory in one time slot [25] or require the communication of too much state information between the linecards [24]. 5.1 Full Ordered Frames First Instead we propose a scheme geared toward our 100Tb s router. Full Ordered Frames First (FOFF) bounds the dif ference in lengths of the VOQs in the second stage, and then uses a re sequencing buffer at the third stage. FOFF runs independently on each linecard ....

I. Keslassy and N. McKeown, "Maintaining packet order in two-stage switches," Proc. of the IEEE Infocorn, June 2002.

.... buffers are used at the input and output stages [17] Other examples of the SB architecture include the load balancing switch recently proposed by Chang [22] which is a Randomized SB and achieves 100 throughput, but missequences packets) and the Deterministic SB variant by Keslassy [23] (which has delay guarantees and doesn t missequence packets, but requires an additional coordination buffer) Table 2 shows a collection of results for different SB routers, some of which for Deterministic SB routers are proved later in this paper. We ve found that within each class of ....

....Comment Input Queued 100 throughput with MWM. Output Queued Gives best theoretical performance. Parallel Packet Switch (PPS) 16] Emulates FCFS OQ. Emulates OQ with WFQ. Buffered PPS [17] Emulates FCFS OQ. Two Stage (Chang [22] 100 throughput with mis sequencing. Two Stage (Keslassy [23]) 100 throughput, delay guarantees, no mis sequencing. Shared Memory Gives best theoretical performance. Parallel Shared Memory (PSM) or Bus based Distributed Shared Memory (DSM) Section II and III) Emulates FCFS OQ. Emulates OQ with WFQ. Crossbar based Distributed Shared Memory ....

I. Keslassy, N. McKeown, "Maintaining packet order in twostage switches," Proceedings of the IEEE Infocom, June 2002

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Isaac Keslassy and Nick McKeown. Maintaining packet order in two-stage switches. In IEEE INFOCOM, June 2002.

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I. Keslassy and N. McKeown, "Maintaining packet order in twostage switches," Proceedings of IEEE INFOCOM,NewYork, 2002.

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I. Keslassy and N. McKeown, \Maintaining packet order in two-stage switches," preprint, 2001.

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