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He Jifeng and Zhu Huibiao. Formalising Verilog. Proc. IEEE International Conference on Electronics, Circuits and Systems, IEEE Computer Society Press, pp. 412--415, Lebanon, December 2000.

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From Operational Semantics to Denotational Semantics for Verilog - Zhu, Bowen, He (2001)   Self-citation (Jifeng Huibiao)   (Correct)

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He Jifeng and Zhu Huibiao. Formalising Verilog. Proc. IEEE International Conference on Electronics, Circuits and Systems, IEEE Computer Society Press, pp. 412--415, Lebanon, December 2000.


Deriving Operational Semantics from Denotational Semantics.. - Zhu, Bowen, He (2001)   Self-citation (Jifeng Huibiao)   (Correct)

No context found.

He Jifeng and Zhu Huibiao. Formalising Verilog. Proc. IEEE International Conference on Electronics, Circuits and Systems, IEEE Computer Society Press, pp. 412-- 415, Lebanon, December 2000.


From Operational Semantics to Denotational Semantics for Verilog - Zhu, Bowen, He (2001)   Self-citation (Jifeng Huibiao)   (Correct)

No context found.

He Jifeng and Zhu Huibiao. Formalising Verilog. Proc. IEEE International Conference on Electronics, Circuits and Systems, IEEE Computer Society Press, pp. 412--415, Lebanon, December 2000.


Soundness, Completeness and Non-redundancy of Operational.. - Zhu, Bowen, He (2002)   Self-citation (Jifeng Huibiao)   (Correct)

....can exhibit a rich variety of behaviours, including event driven computation, shared variable concurrency and simulator based interpretation. The semantics for Verilog is very important because Verilog is widely used in industry. At UNU IIST, the operational semantics has been explored in [1, 3, 4, 7]. Verilog s denotational semantics [9] has also been explored based on the operational semantics using Duration Calculus [8] We have already investigated the derivation of denotational semantics from operational semantics for Verilog [10] We also derived the operational semantics for Verilog ....

....soundness, completeness and nonredundancy in this paper is called D soundness, D completeness and D non redundancy respectively. Here, D indicates our understanding for these three questions is based on denotational semantics. 2 Operational Semantics for Verilog There are some previous work [1, 3, 4, 7] about operational semantics for Verilog, where assignment is not regarded as an atomic action in these previous work. Our operational semantics provided below treats assignment as an atomic action. 2.1 Syntax for Verilog The language discussed in this paper is a subset of Verilog [6] It ....

He Jifeng and Zhu Huibiao. Formalising Verilog. Proc. IEEE International Conference on Electronics, Circuits and Systems, IEEE Computer Society Press, pp. 412--415, Lebanon, December 2000.

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