A. R. Burch, F. Najm, P. Yang, and D. Hocevar. Pattern independent current estimation for reliability analysis of CMOS circuits. In Proceedings of the 25th Design Automation Conference, pages 294--299, June 1988.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....decisions during the VLSI synthesis process. Probabilistic methods for power or current estima tion are attractive because statistical estimates can be obtained without recourse to time consuming ex haustive simulation. In the )ast, probabilistic peak current estimation methods [e.g. [5]) that compute probabilistic current waveforms for combinational circuits have been developed. Estimation of worst case power dissipation (e.g. 10] 7] is a difficult prob lem requiring a branch and bound search and these methods have been applied to small to moderate sized circuits. The ....

R. Burch, F. Najm, P. Yang, and D. Hocevar. Pattern-independent Current Estimation for Reliability Analysis of CMOS Circuits. In Proceed- ings of the 25 h Design Automation Conference, pages 294-299, June 1988.

.... density now possible with CMOS integrated circuits, together with growing importance of reliability as a design issue, has made estimating worstcase power dissipation in logic circuits an important problem (a similar problem, peak current estimation, has received considerable recent attention [3]) In general, power dissipation in a logic circuit is a complex function of propagation delays, clock frequency, technology parameters, circuit topology, and, in the case of CMOS, the input vector or vector sequence applied. This last aspect makes accurate estimation of worst case power ....

R. Bureh, F. Najm, P. Yang, and D. Hocevar, "Pattern-independent current estimation for reliability analysis of CMOS circuits," in Proc. 25th Design Automat. Conf, June 1988, pp. 294-299.

....order to find the sequence that produces the maximum power dissipation is exponentialin the number of inputs to the circuit. Estimating worst case power dissipation in logic circuits is becoming an important problem and a similar problem, that of current estimation, has received recent attention [4]. For some applications, it is essential that a tight upper bound on the power dissipation be given. In this paper, we attempt to derive algorithms for exact and approximate estimation of worstcase power dissipalion in dynamic and static CMOS combin. alional circuits. Our approach is to use a ....

R. Burch F. Najm P. Yang D. Ilocevar. Patternindependent current estimation for reliability analysis of cmos circuits. In ACMIEEE 5h Design Automation Conference, pages 294-299, 1988.

....its exponential complexity. However, for the circuits that this method is applicable to, the estimates provided by the method can serve as a basis for comparison among differ E x sw ( prob x 01 ( prob x 10 ( ent approximation schemes. The concept of a probability waveform is introduced in [7]. This waveform consists of a sequence of transition edges or events over time from the initial steady state (time 0 ) to the final steady state (time ) where each event is annotated with an occurrence probability. The probability waveform of a node is a compact representation of the set of all ....

R. Burch, F. Najm, P. Yang, and D. Hocevar. " Pattern independent current estimation for reliability analysis of CMOS circuits. " In Proceedings of the 25th Design Automation Conference, pages 294--299, June 1988.

....user supplied input signal probabilities are propagated into the circuit. To achieve this, special models for the components have to be developed and stored in the module library. Cirit [26] first proposed an power estimation based on the probabilities. Based on this, probabilistic simulation [50] [52] was proposed which accepts the specification of probability waveforms. It was further enhanced for more accuracy by Stamoulis et al. 10 [53]and Tsui et al. 54] Other probabilistic approaches based on transition density [23] and on Binary Decision Diagrams (BDDs) 31] are proposed. All ....

R. Burch, F. Najm, P. Yang, and D. Hocevar, " Pattern-independent current estimation for reliability analysis of CMOS circuits," 25th ACM/IEEE Design Automation Conference, Anaheim, CA, pp. 294-299, June 12-15, 1988.

....input pattern dependent. In probabilistic techniques , user supplied input signal probabilities are propagated into the circuit. by developing special models for the components in the module library. Cirit [7] first proposed an power estimation based on the probabilities. Probabilistic simulation [14] [16] which accepts the specification of probability waveforms. It was further enhanced for more accuracy by Stamoulis et al. 17]and Tsui et al. 6] Other probabilistic approaches based on transition density [5] and on Binary Decision Diagrams (BDDs) 18] have been proposed. All the above ....

R. Burch, F. Najm, P. Yang, and D. Hocevar, " Patternindependent current estimation for reliability analysis of CMOS circuits," 25th ACM/IEEE Design Automation Conference, Anaheim, CA, pp. 294-299, June 12-15, 1988.

....the signal and transition probabilities of the internal nodes of the circuit. These probabilities depend on the input patterns, the delay model and the circuit structure. Several signal and transition probabilities estimation algorithms have been developed for combinational circuit. Burch et al. [2] introduced the concept of a probability waveform. Given such waveforms at the primary inputs and with some convenient partitioning of the circuit, they examined every sub circuit and derive corresponding waveforms at the internal circuit nodes. Najm [7] described an efficient technique called ....

A. R. Burch, F. Najm, P. Yang, and D. Hocevar. Pattern independent current estimation for reliability analysis of CMOS circuits. In Proceedings of the 25th Design Automation Conference, pages 294--299, June 1988.

....by an I DDQ test. As a consequence, the current must be monitored only after the transient current has settled down. This is even more difficult in a complex circuit where many gates switch in succession and the transient may last up to a few microseconds. Thus a good fault free current estimation [2] is essential in order to perform a correct I DDQ test. If, under a certain test vector, n gates are expected to switch in succession, and if the gates average switching time is t avg , the pulse duration of the input signal must be much greater than n Delta t avg so that current monitoring ....

R. Burch, F. Najm, P. Yang, D. Hocevar, "Pattern Independent Current Estimation for Reliability Analysis of CMOS Circuits", Proc. Design Auto. Conf., pp. 294---299, 1988.

....work Previous work has mainly focused on the estimation of signal probabilities and the average power consumption. Cirit [4] estimates the dynamic power dissipation at the transistor level based on the the probability of the drain of a transistor making a power consuming transition. Burch et al., [2] introduce the concept of a probability waveform. Given such waveforms at the primary inputs and with some convenient partitioning of the circuit, they examine every sub circuit and derive corresponding waveforms at the internal circuit nodes. Najm [10] describes an efficient technique to ....

A. R. Burch, F. Najm, P. Yang, and D. Hocevar. Pattern independent current estimation for reliability analysis of CMOS circuits. In Proceedings of the 25th Design Automation Conference, pages 294--299, June 1988.

....of various design alternatives. Several researchers have studied the problem of estimating power consumption. Cirit [4] estimates the dynamic power consumption at the transistor level based on the probability of the drain of a transistor making a power consuming transition. Burch et al. [3] introduce the concept of probability waveforms. Given such waveforms at the primary inputs and with some convenient partitioning of the circuit, they examine every sub circuit and derive corresponding waveforms at the internal circuit nodes. Najm et al. 7] use a probabilistic simulation approach ....

A. R. Burch, F. Najm, P. Yang, and D. Hocevar. Pattern independent current estimation for reliability analysis of CMOS circuits. In Proceedings of the 25th Design Automation Conference, pages 294--299, June 1988.

....The power is dependent on the circuit structure as well as the circuit inputs: it is said to be input pattern dependent. To solve this problem, one can simulate the circuit for a large number of inputs and then average the switching activity. On the other hand, probabilities where introduced [Bur88] to perform the averaging before running the analysis [Najm95] by estimating the number of transitions per clock cycle. Using the Boolean network functionality and connectivity, these input probabilities are propagated through the network. To apply statistical properties, reconvergent fanouts and ....

R.Burch, "Pattern-Independent Current Estimation for Reliability Analysis of CMOS Circuits", In proc. of the Design Automation Conference, pp. 294-299, 1988.

....between the power rails of a faulty gate is three or four times that of a fault free gate. This means that a faulty gate has a power consumption greater than that of a fault free gate. 2 IDDQ Current Sensing The estimation of the fault free current may be performed using a software estimator [2]; afterword the power supply current may be monitored in order to identify a faulty state if such current is higher than the expected current using off chip or on chip current sensors. 2.1 Off Chip Sensor The problem of this technique is that of bypassing the output transient current that may ....

R. Burch, F. Najm, P. Yang, D. Hocevar, "Pattern Independent Current Estimation for Reliability Analysis of CMOS Circuits", Proc. Design Auto. Conf., pp. 294---299, 1988.

....University of Illinois at Urbana Champaign Texas Instruments Inc. Urbana, Illinois 61801 Dallas, Texas 75265 Abstract This paper deals with the estimation of the median time to failure (MTF) due to electromigration in the power and ground busses of CMOS VLSI circuits. In our previous work [3, 4], we presented a novel technique for MTF estimation based on a stochastic current waveform model. In [6] we argued that including the variance waveform of the current, in addition to its expected waveform derived in [3, 4] would further improve the accuracy of the MTF estimate. In this paper, we ....

....in the power and ground busses of CMOS VLSI circuits. In our previous work [3, 4] we presented a novel technique for MTF estimation based on a stochastic current waveform model. In [6] we argued that including the variance waveform of the current, in addition to its expected waveform derived in [3, 4], would further improve the accuracy of the MTF estimate. In this paper, we present a novel technique for deriving the variance waveform for CMOS circuits. Using this technique, we establish the importance of the variance waveform by showing that its contribution to the MTF estimate can be in the ....

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R. Burch, F. Najm, P. Yang, and D. Hocevar, "Pattern-independent current estimation for reliability analysis of CMOS circuits," 25th ACM/IEEE Design Automation Conference, Anaheim, CA, pp. 294--299, June 12--15, 1988.

....both in terms of accuracy and speed. We focus our attention on the power and ground busses, and derive loading currents for them to be used for MTF estimation. These busses are the usual, although not only, locations of severe EM failures. Preliminary results of this works have been presented in [6, 7]. It is important to understand exactly what information about the current is needed for EM analysis. CMOS circuits, as pointed out above, draw current only during switching, and, therefore, produce a non dc current waveform. It is well known [5] that, in the presence of such waveforms, the MTF ....

R. Burch, F. Najm, P. Yang, and D. Hocevar, "Pattern-independent current estimation for reliability analysis of CMOS circuits", ACM/IEEE 25 th Design Automation Conference, pp. 294--299, June 12--15, 1988.

....the power was computed based on (1) Since a zero delay model was used, the toggle power was ignored. A probabilistic power estimation approach that does compute the toggle power and does not make the zero delay or temporal independence assumptions, called probabilistic simulation was proposed in [20 22]. In this technique, the use of probabilities was expanded to allow the specification of probability waveforms, as described in more detail in the next section. This approach assumed spatial independence, and was not restricted to only synchronous circuits. Improvements on this technique were ....

....the same way, in terms of their descendants. Thus a depth first traversal of the BDD, with a post order evaluation of P ( Delta) at every node is all that is required. This can be implemented using the scan function of the BDD package [36] 4.2. Probabilistic Simulation (CREST) This approach [20 22] requires the user to specify typical signal behavior at the circuit inputs using probability waveforms. A probability waveform is a sequence of values indicating the probability that the signal is high for certain time intervals, and the probability that it makes low to high transitions at ....

R. Burch, F. Najm, P. Yang, and D. Hocevar, "Pattern-independent current estimation for reliability analysis of CMOS circuits," 25th ACM/IEEE Design Automation Conference, Anaheim, CA, pp. 294--299, June 12--15, 1988.

No context found.

A. R. Burch, F. Najm, P. Yang, and D. Hocevar. Pattern independent current estimation for reliability analysis of CMOS circuits. In Proceedings of the 25th Design Automation Conference, pages 294--299, June 1988.

No context found.

A. R. Burch, F. Najm, P. Yang, and D. Hocevar. Pattern independent current estimation for reliability analysis of CMOS circuits. In Proceedings of the 25th Design Automation Conference, pages 294--299, June 1988.

No context found.

R. Burch, F. Najm, P. Yang, and D. Hocevar. Pattern-independent current estimation for reliability analysis of CMOS circuits. In Proceedings of the 25th Design Automation Conference, pages 294--299, June 1988.

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A. R. Burch, F. Najm, P. Yang, and D. Hocevar. Pattern independent current estimation for reliability analysis of CMOS circuits. In Proceedings of the 25th Design Automation Conference, pages 294--299, June 1988.

No context found.

R. Burch, F. Najm, P. Yang, and D. Hocevar. " Pattern independent current estimation for reliability analysis of CMOS circuits. " In Proceedings of the 25th Design Automation Conference, pages 294--299, June 1988.

No context found.

R. Burch, F. Najm, P. Yang, and D. Hocevar. " Pattern independent current estimation for reliability analysis of CMOS circuits. " In Proceedings of the 25th Design Automation Conference, pages 294--299, June 1988.

No context found.

R. Burch, F. Najm, P. Yang, and D. Hocevar, "Pattern-independent current estimation for reliability analysis of CMOS circuits," in Proc. 25th Design Automation Conf., June 1988, pp. 294--299.

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R. Burch, F. Najm, P. Yang, and I. Hajj, "Pattern independent current estimation for reliability analysis of CMOS circuits," in Proc. Design Automat. Conf., 1988, pp. 294--299.

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R.Burch. Pattern-Independent Current Estimation for Reliability Analysis of CMOS Circuits, In Proc. of the Design Automation Conference, pp. 294-299, 1988.

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R. Burch, F. Najm, P. Yang, and D. Hocevar, "Pattern-independent current estimation for reliability analysis of CMOS circuits," 25th ACM/IEEE Design Automation Conference, Anaheim, CA, pp. 294-299, June 12-15, 1988.

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