R. Neff, "Automatic Synthesis of CMOS Digital/Analog Converters", PhD. Dissertation Electronics Research Laboratory, College of Engineering, Berkeley University, 1995 (available on the WWW).

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Systematic Design of a 14-bit 150-MS/s CMOS.. - Van der Plas.. (2000)   (Correct)

....sizes Clock driver sizes Table 2: The designable parameters of the presented D A converter. III Systematic Design Methodology The performance driven top down design methodology has been accepted as the de facto standard for systematically designing analog building blocks in academia [6,7] In [8] the design of current steering D A converters has been automated following this methodology for a specific architecture which is however only feasible for 8 or 10 bit D A converters. Sizing Architectural level Verification Device level Floorplanning Verification Verification Layout Module ....

R. Neff, "Automatic Synthesis of CMOS Digital/Analog Converters", PhD. Dissertation Electronics Research Laboratory, College of Engineering, Berkeley University, 1995 (available on the WWW).

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