| A. A. Mir, S. Balakrishnan, and S. Tahar, "Modeling and Verification of Embedded Systems using Cadence SMV", Proceedings of the 2000. |
....processor verification do not verify a whole processor but they verify only some parts [6,9,11] This is because the size of the whole processor in full details is too large to be verifiable. Other approaches are model based approaches. These approaches are often used to verify control circuits [12,13,14], protocols [15] and asynchronous control circuits [16] Although there is an application of these approaches for verifying processors [17] but it is the verification at behavior level. There are only a few research that apply model based approaches to verify processors and there are only few ....
A. A. Mir, S. Balakrishnan, and S. Tahar, "Modeling and Verification of Embedded Systems using Cadence SMV", Proceedings of the 2000.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC