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Massimiliano Chiodo, Thomas R. Shiple, Alberto SangiovanniVincentelli, Robert K. Brayton, "Automatic Compositional Minimization in CTL Model Checking," IEEE International Conference on ComputerAided Design, 1992, pp. 172--178.

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New Techniques for Efficient Verification with Implicitly.. - Hu, York, Dill (1994)   (11 citations)  (Correct)

....in particular, is crucial to the economic justification of formal verification; performing verification makes sense only if the cost and effort required to use the verifier is small compared to the cost and effort saved by catching errors during verification. With a few notable exceptions (e.g. [21, 7, 9]) however, BDDbased approaches have largely failed to achieve these objectives for high level design verification. The straightforward algorithms appear generally unable to handle designs much more complex than dining philosophers or rings of mutual exclusion elements, and behind the This ....

Massimiliano Chiodo, Thomas R. Shiple, Alberto SangiovanniVincentelli, Robert K. Brayton, "Automatic Compositional Minimization in CTL Model Checking," IEEE International Conference on ComputerAided Design, 1992, pp. 172--178.


A Survey of Verification Techniques for Cache Coherence Protocols - Pong, Dubois (1996)   (Correct)

....of the method in some cases [52, 53] Several approaches to avoid the explosion of OBDD sizes have been proposed. Hu and Dill [53] reduce the OBDD size by eliminating functionally dependent variables, i.e. variables which are always functions of other independent variables. Chiodo, et al. [17, 84] have introduced compositional model checking. Their idea, applicable to synchronous systems, is to reduce the component machines with respect to the property to verify. It is hoped that the OBDD formed by 3. This problem also exists in Nanda and Bhuyan s [68] approach of composing modules ....

Chiodo, M., Shiple, T.R., Sangiovanni-Vincentelli, A.L. and Brayton, R.K., "Automatic Compositional Minimization in CTL Model Checking", Proc. of the Int'l Symp. on ComputerAided Design, pp. 172-178, 1992. 50


Minimizing Interacting Finite State Machines: A.. - Aziz, Singhal, Swamy, .. (1994)   (9 citations)  (Correct)

.... we briefly suggest extensions of our approach to the model checking paradigm, details of which are available in [6] Many other compositional strategies for forming a re s3 s4 d 4 e 3 e 2 e 1 e 4 s1 s2 d 3 d 2 d 1 STG Figure 1: Visual representations of FSMs duced product exist e.g. [7, 8, 2, 9]. Our major contributions are defining equivalences in the presence of fairness that are fast to compute, using the property to achieve greater minimization, and using knowledge of equivalent states to derive dont care s to minimize the BDD representation for the system. We tested some of our ....

....obtain dont care s to minimize the BDD. Consider a transition relation T , and an equivalence relation E over the underlying states, and suppose E(s; t) Suppose there is a transition T (s; i; o; s 0 ) Then a transition from t to s 0 under input i, and output o may be added. In the spirit of [8] we derive maximal don t care sets which we use to simplify the BDD representing the STG, using some new BDD minimization techniques [19] 4.2 Bounds on the STG Let M = S; r; I; O; T ) be an FSM, and ffl R(x) be the set of reached states, and ffl E(x; y) be an equivalence relation on the ....

M. CHIODO, T. R. SHIPLE, AND A. L. SANGIOVANNIVINCENTELLI, "AUTOMATIC COMPOSITIONAL MINI- MIZATION IN CTL MODEL CHECKING," IN Proc. Intl. Conf. on Computer-Aided Design, PP. 172--178, 1992.


Formal Methods in VLSI System Design - Aziz (1996)   (1 citation)  (Correct)

....5.1. We have applied these ideas to both the language emptiness and model checking paradigms. The formulation for language containment is given in Section 5.1; extensions to model checking are sketched in Section 5.2. Many other compositional strategies exist for forming a reduced product e.g. [72, 29, 50, 17]. In the language containment paradigm our primary contribution is defining equivalences in the presence of fairness, and identifying a subset of these that can be easily computed. In the model checking formulation our primary contributions are results on the completeness of equivalences in the ....

M. Chiodo, T. R. Shiple, and A. L. Sangiovanni-Vincentelli. Automatic Compositional Minimization in CTL Model Checking. In Proc. Intl. Conf. on Computer-Aided Design, pages 172--178, 1992.


Reducing BDD Size by Exploiting Functional Dependencies - Hu, Dill (1993)   (26 citations)  (Correct)

.... the system with few dependent variables [16] Similarly, the Controller Area Network protocol verified by Chiodo et al. has almost no depedent variables because it relies on a broadcast bus with automatic collision detection, and the individualnodes have no information about the rest of the system [8]. Academic examples like dining philosophers also tend not to have many dependent variables because each process has very little state and behaves largely independently of the rest of the system. If BDD based verification is to apply to a broader range of problems, dealing with functionally ....

Massimiliano Chiodo, Thomas R. Shiple, Alberto SangiovanniVincentelli, Robert K. Brayton, "Automatic Compositional Minimization in CTL Model Checking," IEEE International Conference on ComputerAided


Techniques For Efficient Formal Verification Using Binary Decision.. - Hu (1995)   (8 citations)  (Correct)

.... system with few dependent variables [67] Similarly, the Controller Area Network protocol verified by Chiodo et al. has almost no dependent variables because it relies on a broadcast bus with automatic collision detection, and the individual nodes have no information about the rest of the system [15]. Academic examples like dining philosophers also tend not to have many dependent variables because each process has very little state and behaves largely independently of the rest of the system. If BDD based verification is to apply CHAPTER 5. FUNCTIONALLY DEPENDENT VARIABLES 50 to a broader ....

Massimiliano Chiodo, Thomas R. Shipe, Alberto Sangiovanni-Vincentelli, and Robert K. Brayton. Automatic compositional minimization in CTL model checking. In IEEE International Conference on Computer-Aided Design, pages 172-- 178, 1992. BIBLIOGRAPHY 132


Formal Design Verification of Digital Systems - Shiple, Aziz, Balarin, Cheng, .. (1993)   (1 citation)  Self-citation (Shiple Sangiovanni-vincentelli Brayton)   (Correct)

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M. Chiodo, T. R. Shiple, A. L. Sangiovanni-Vincentelli, and R. K. Brayton. Automatic compositional minimization in CTL model checking. In Proc. Int'l Conf. on Computer-Aided Design, pages 172--178, Nov. 1992.


Formula-Dependent Equivalence for Compositional CTL.. - Aziz, Shiple.. (1994)   (14 citations)  Self-citation (Shiple Sangiovanni-vincentelli)   (Correct)

....determining if a system can exhibit a certain behavior. This is especially true when ascertaining if the environment for a system has been correctly modeled so that it can produce the stimuli of interest. Hence, we are interested in techniques that can handle full CTL. The work of Chiodo et al. [5] has similar aims as ours, and the current work can be seen as an outgrowth of that work. Both approaches are exact, fully automatic, and formula dependent. We have extended Chiodo s method (see Section 5.2) and have cast our extension as an equivalence on states. 3 Preliminaries 3.1 Finite ....

....(line 8) so we can again construct a smaller machine for M 1 . Thus, we may want to follow a strategy where a nested formula is recursively decomposed into simpler subformulas, and the compositional model checker of Figure 7 is applied to each subformula. Note that whereas Chiodo et al. [5] recursively decompose a formula into its immediate subformulas, we can decompose OE PASS OE FAIL OE equiv classes 1 q ; f1; 2; 3g 2 p f2; 3g f1g f1g; f2; 3g 3 p q ; f1g f1g; f2; 3g 4 9G(p q) f1g f1g; f2; 3g 5 Q ; f3g f1; 2g; f3g 6 (9G(p q) Q ; f1; 3g f1g; f2g; f3g 7 Q 0 ; f1; ....

M. Chiodo, T. R. Shiple, A. L. Sangiovanni-Vincentelli, and R. K. Brayton. Automatic compositional minimization in CTL model checking. In Proc. Int'l Conf. on Computer-Aided Design, pages 172--178, Nov. 1992.


Verification of Electronic Systems - Sangiovanni-Vincentelli, McGeer..   Self-citation (Sangiovanni-vincentelli)   (Correct)

....value of every variable is forgotten. Similarly, the conservatism associated with the Graph Abstraction is simply the most visible example of the inherent conservatism associated with the quantification abstraction. Pioneering work on abstraction was done by Clarke and his colleagues, and by others[12, 11, 10]. 4.5 Granularity of Time Though we often discuss time as a continuous variable, in fact it is quantized at least so far as our mathematics can describe it. More precisely, given any extant model of timing behavior of digital systems, one can demonstrate that time is quantized and that the ....

....FSMs into a single one. Since the composition has number of states bounded by the product of the number of states of the FSMs in the decomposed representation, we often have a state explosion problem. Maintaining the representation compact is key to make formal verification applicable. An approach [10] is to automatically extract from each component machine only the behavior relevant to the verification of the given property through abstraction, and compose these extracted subcomponents to represent only the part of the behavior of the entire system needed to verify the property. This approach ....

M. Chiodo, T. Shiple, A. Sangiovanni-Vincentelli, and R. Brayton. Automatic compositional minimization in ctl model checking. In Proceedings of the International Conference on Computer-Aided Design, 1992.


BDD Variable Ordering for Interacting Finite State Machines - Aziz, Tasiran, Brayton (1994)   (14 citations)  Self-citation (Brayton)   (Correct)

....formulate algorithms for variable ordering. Our experimental results show that the procedures are efficient, and give good orderings. This research was supported by SRC 93 DC 008 1 Introduction The verification and synthesis of sequential systems is an area of active reseach in VLSI CAD [Tou][Chi]. A central problem in this field is dealing with the state explosion problem. Informally, this refers to the fact that given n Finite State Machines (FSMs) fM 1 ; M 2 ; M n g, the number of states in the product machine is the product of the number of states in each individual machine. As ....

M.Chiodo, T. R. Shiple, A. Sangiovanni-Vincentelli, R. K. Brayton,"Automatic Compositional Minimization in CTL Model Checking", in Proceedings of the International Conference on Computer-Aided Design, pp. 172-178 Nov. 1992.

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