B. Svantesson, S. Kumar, and A. Hemani. A methodology and algorithms for efficient interprocess communication synthesis from system description in SDL. In Proc. of the 11th Int. Conf. on VLSI Design, pages 78--84, Chennai, India, 4-7 Jan. 1998.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....distributed simulation. 1. Introduction Current approaches to system modelling can be divided into two groups, homogeneous and heterogeneous models. Homogeneous models are based on a single formalism or language such as VHDL [8, 10] C [12] C [20] SpecChart [23] Java [14, 24, 27] SDL [7, 26], etc. These languages are rich and can typically be used far beyond their original scope, in particular when they are extended with special features, e.g. for communication. However, such homogeneous solutions come at a price. A language, which is well established in one community is not ....

B. Svantesson, S. Kumar, A. Hemani, "A Methodology and Algorithms for efficient interprocess communication synthesis from system description in SDL", Proc. of the IEEE International Conference on VLSI Design, 1998.

.... VHDL has been proposed as system specification language [1] sometimes by extending it with advanced features such as communication facilities [15] or object oriented concepts [4] Similar attempts have been put forward for popular software languages such as C [3] C [2] Java [5] 6] or SDL [7][8]. However, such homogeneous solutions come at a price. A language, which is well established in one community, is not always well received in another community. There are both accidental and essential reasons for this. The investment in a given language in terms of tools, competence, and existing ....

Bengt Svantesson, Shashi Kumar, Ahmed Hemani, "A Methodology and Algorithms for efficient interprocess communication synthesis from system description in SDL", Proceedings of the IEEE International Conference on VLSI Design, 1998.

....translators to VHDL code [8, 9,10,11] Although SDL is widely used in the software and telecommunication community, it is not that popular with hardware designers. It has attracted interest because it offers good system structuring features, high level communication and the possibility of codesign [12,13,14]. Like SDL, LOTOS (Language Of Temporal Ordering Specification [15] was developed for describing communications systems. The inspiration for the work reported in this dissertation was the LOTOS based approach to hardware description currently under development at the University of Stirling: DILL ....

B. Svantesson, S. Kumar and A. Hemani. "A methodology and algorithms for efficient inter-process communication synthesis from system descriptions in SDL".

....work properly. This would result in an extremely inefficient implementation with unnecessary high area cost. To solve this problem, one of the following communication schemes could be selected for each process that provides the most efficient implementation without affecting the system s behaviour [21]. 6.5.1. Send and Forget The send and forget based communication is the most basic scheme. As suggested by the name, the sending process can just emit a signal and continue the transition immediately. It is, in some respect similar to SDL because there the sender does not have to take care of the ....

....be handshake. Otherwise, if any is FIFO, will also be FIFO. If no is either forced handshake or FIFO, then will be handshake, if any is handshake or either send and forget or strobe based if all are any. If the FIFO model is selected for , the size of the FIFO has to be determined. According to [21], this can be done by using the equation where is a factor between 0 and 1 which affects the probability of the occurrence of a signal loss and has to be chosen depending on the burstiness of the signals . 1 1. A greater k reduces the probability of a signal loss but will result in a larger ....

Bengt Svantesson, Shashi Kumar, Ahmed Hemani, "A Methodology and Algorithms for Efficient Interprocess Communication Synthesis from System Description in SDL" in Proc. of VLSI Design `98, pp 78-84, January 1998, Chennai, India

....2. Related Work Many computational models have been described. For a comprehensive overview see Edwards et al. 4] Very often real time systems are specified by means of concurrent processes, which communicate asynchronously. Such a communication model forms the base for languages as SDL [17, 19], VHDL [18] or SpecCharts [15] While this model serves as a good implementation model, due to its closeness to architecture, we argue, that it is not a good choice for a functional system model. Many design decisions are already present in such a model, in particular the partitioning into ....

....such as asynchronous message passing with infinite FIFOs is problematic, because it can never be implemented fully in hardware. In fact, this is most of the time not even necessary because in many cases a much simpler mechanism, such as a strobe based or a handshake based protocol suffices [16, 19]. But even a complicated analysis cannot always find the simplest possible implementation. In addition the asynchronous communication mechanism makes it very difficult to reason about such a model and to apply formal methods, because of the state space explosion and potential non determinism. A ....

B. Svantesson, S. Kumar, A. Hemani, "A Methodology and Algorithms for Efficient Inter-process Communication Synthesis from System Description in SDL", Proceedings of the IEEE International Conference on VLSI Design, 1998.

No context found.

B. Svantesson, S. Kumar, and A. Hemani. A methodology and algorithm for efficient interprocess communication synthesis from system description in sdl. In Proc. of VLSI Design Conference, 1998.

....needs to be optimized. System synthesis of data flow applications, as SPW BONES from Alta Cadence, and COSSAP from Synopsys, mainly concentrate on synthesis of data flow arithmetic. According to telecom network components, 8,10,12,15] can be considered, but no support for exploration is provided. [13,14] starts from SDL and supports interprocess communication refinement and hardware synthesis of dynamic processes. 6] provides an untimed simulation environment and supports memory management for irregular and dynamic data structures. We propose a new methodology, extended from both these ....

....the previous step could be a multi port FIFO buffer. Several implementations (send and forget, strobe, handshake, FIFO) are possible, corresponding to different trade offs between cost and performance. The choice is determined by a static analysis of the inter process communication, proposed in [14], taking into account the real time requirements of the system, the assumed clock speed of the system, and the input rate of each process. 4. Conclusions With this new methodology, complete and efficient synthesis of telecom network components, starting from SDL, is now possible. This ....

B. Svantesson et al., A methodology and algorithms for efficient interprocess communication synthesis from system descriptions in SDL. Int. Conf. on VLSI Design, 1998.

....number of SBs of right size so as to optimize the power consumption. The communication refinement step is based on our previous work on hardware synthesis from SB2: Synchronous Block 2 SB3: Synchronous Block 3 SB1: Synchronous Block 1 data Handshake signals Fig. 2. The GALS architecture. SDL, [10]. This is a well developed methodology that has been applied to large industrial problems like synthesising a part of a network terminal consisting of an Asynchronous Transfer mode ( ATM ) switch and Operation and Maintenance ( OAM ) block, 3] Though the published results for this methodology ....

....parameter like if a process can be slowed down etc. Using this parameters, a requirements analysis algorithm determines the cheapest possible mode of communication. If a FIFO is required, the analysis algorithms also dimensions it. Details of this communication refinement step can be found in [10] and its use on an industrial size example in [3] VHDL does not have the non blocking communication model. So the communication refinement is a simpler problem and would not require instantiation of FIFOs as in the case of SDL. Once the communication between SBs is refined, the next step is to ....

B. Svantesson, S. Kumar, A. Hemani, "A Methodology and Algorithms for Efficient Interprocess Communication Synthesis from System Description in SDL", in Proc. of VLSI Design'98, pp 78-84, 7-8 Jan 1998, Chennai, India

....large amount of user friendly tool support is available for modelling, simulation and testing of systems [23] The tools also support generation of executable C code from an SDL description. Recently, researchers have started looking at the problem of direct hardware synthesis from SDL description [15, 16, 17]. 4.4 Haskell Haskell is a modern general purpose, purely functional programming language. It has been developed by a committee with the goal in mind to design a common non strict functional language. As a result of this work Haskell is described in the Haskell report [21] which serves as a ....

Bengt Svantesson, Shashi Kumar, Ahmed Hemani, "A Methodology and Algorithms for efficient inter-process communication synthesis from system description in SDL", IEEE International Conference on VLSI Design 98, Madras, India.

No context found.

B. Svantesson, S. Kumar, and A. Hemani. A methodology and algorithms for efficient interprocess communication synthesis from system description in SDL. In Proc. of the 11th Int. Conf. on VLSI Design, pages 78--84, Chennai, India, 4-7 Jan. 1998.

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC