Y. S. Jean and C. Y. Wu "The threshold-voltage model of MOSFET devices with localized interface charge" In Proceedings of IEEE Transactions on Electron Devices, 1997.  Home/Search Document Not in Database Summary Related Articles Check |
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Spice Model for Simulating Hot-Carrier Effects in.. - Roy, Chandorkar, Sharma (Correct)
....that increase in the interface states N it increases the threshold voltage for NMOS. The length of the damaged region is of important consideration. It has been demonstrated that when the damaged region is small compared to channel length, the change in threshold voltage for NMOS is much smaller [10]. However as the damaged region length l dam is increased, this shift approaches the limiting value of DeltaQ it =C ox . 20] This behavior has been attributed to the screening effect of built in potential and the applied bias near the drain end. To account for this behavior, a correction factor ....
Y.S. Jean, C.Y. Wu," The Threshold-Voltage Model of MOSFET Devices with Localized Interface Charge", IEEE Trans. Electron Devices. Vol 44, No. 3 , pp 441-447, March 1997
FLAW: FPGA Lifetime AWareness - Suresh Srinivasan Prasanth (2006) (Correct)
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Y. S. Jean and C. Y. Wu "The threshold-voltage model of MOSFET devices with localized interface charge" In Proceedings of IEEE Transactions on Electron Devices, 1997.
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