S. J. Patel, D. H. Friendly, and Y. N. Patt. Critical issues regarding the trace catch fetch mechanism. Technical report, University of Michigan, 1997. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Improving Dynamic Cluster Assignment for Clustered Trace.. - Bhargava, John (2003) (4 citations) (Correct)
.... work, the clustered execution architecture is combined with an instruction trace cache, resulting in a clustered trace cache processor (CTCP) A CTCP achieves a very wide instruction fetch bandwidth using the trace cache to fetch past multiple branches in a low latency and highbandwidth manner [14, 15, 18]. The CTCP environment facilitates the use of retire time cluster assignment, which addresses many of the problems associated with issue time cluster assignment. Cluster assignment is accomplished at retire time by physically (but not logically) reordering instructions within a trace cache line ....
....for execution. Decode FU Dispatch Execute DC Return DC Access D TLB Writeback mem Steer RS Issue Rename RF Access Fetch x 3 Fill Unit Figure 2. The Pipeline of the Baseline CTCP Trace Cache The trace cache allows multiple basic blocks to be fetched with just one request [14, 15, 18]. The retiring instruction stream is fed to the fill unit which constructs the traces that consist of up to three basic blocks. When the traces are constructed, the intra trace and intra block dependencies are analyzed. This allows the fill unit to add bits to the trace cache line, which ....
[Article contains additional citation context not shown here]
S. J. Patel, D. H. Friendly, and Y. N. Patt. Critical issues regarding the trace catch fetch mechanism. Technical report, University of Michigan, 1997.
Cluster Assignment Strategies for a Clustered Trace Cache.. - Bhargava, John (2003) (Correct)
.... report, the clustered execution architecture is combined with an instruction trace cache, resulting in a clustered trace cache processor (CTCP) A CTCP achieves a very wide instruction fetch bandwidth using the trace cache to fetch past multiple branches in a low latency and highbandwidth manner [13, 14, 17]. The CTCP environment enables the use of retire time cluster assignment, which addresses many of the problems associated with issue time cluster assignment. In a CTCP, the issue time dynamic cluster assignment logic and steering network can be removed entirely. Instead, instructions are issued ....
....for execution. Decode FU Dispatch Execute DC Return DC Access D TLB Writeback mem Steer RS Issue Rename RF Access Fetch x 3 Fill Unit Figure 2: The Pipeline of the Baseline CTCP Trace Cache The trace cache allows multiple basic blocks to be fetched with just one request [13, 14, 17]. The retired instruction stream is fed to the fill unit which constructs the traces. These traces consist of up to three basic blocks of instructions. When the traces are constructed, the intratrace and intra block dependencies are analyzed. This allows the fill unit to add bits to the trace ....
[Article contains additional citation context not shown here]
S. J. Patel, D. H. Friendly, and Y. N. Patt. Critical issues regarding the trace catch fetch mechanism. Technical report, University of Michigan, 1997.
Traveling Speculations: An Integrated Prediction Strategy.. - Bhargava, Rubio, John (2002) (Correct)
....with extra information has been discussed in various forms. Trace caches store information beyond the decoded instruction information. Traditional versions of the trace cache choose to store multiple branch targets, branch directions, and the terminating instruction type in each trace cache line [28, 33]. The fill unit by Melvin, et al. places dynamically determined instruction information into the decoded instruction cache [21, 6] The information consists of decoding hints to reduce the latency of variable length instruction decoding. The fill unit also places dynamic branch information into ....
S. J. Patel, D. H. Friendly, and Y. N. Patt. Critical issues regarding the trace catch fetch mechanism. Technical report, University of Michigan, 1997.
Instruction History Management for High-Performance Microprocessors - Bhargava (2003) Self-citation (Patt) (Correct)
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S. J. Patel, D. H. Friendly, and Y. N. Patt. Critical issues regarding the trace catch fetch mechanism. Technical report, University of Michigan, 1997.
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