Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, and David A. Wood. Fine-Grain Access Control for Distributed Shared Memory. ACM SIGPLAN Notices, 29(11):297--306, 1994.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....a and B are not aliases. With fine grained protection, the compiler can write protect B outside the loop and then accumulate a in a register. Fix up code is needed in case B is written. Flexible sub page protection enables distributed shared memory systems like Shasta [27] and its predecessor [28]. Shasta found significant benefit from configurable line sizes, but since these line sizes did not map to virtual address pages it performed access checks in software. While the authors of Shasta used impressive compiler techniques to reduce the cost of these software access checks, our ....

I. Schoinas, B. Falsafi, A. R. Lebeck, S. K. Reinhardt, J. R. Larus, and D. A. Wood. Fine-grain access control for distributed shared memory. In ASPLOS-VI, 1994.

....is implemented in hardware (e.g. by leveraging off of virtual memory protection mechanisms to provide access control) Typical examples of mostly software systems include Ivy [52] Munin [11] and TreadMarks [38] coherence units in these systems are the size of virtual memory pages. Blizzard [70] implements a similar scheme on the CM 5 at the granularity of individual cache lines. By manipulating the error correcting code bits associated with every memory block, Blizzard can control access on a cache line by cache line basis. All Software In an all software DSM system, all three of the ....

.... of the mechanisms identified above are implemented entirely in software (e.g. Orca [3] Several researchers have recently reported on experiences with all software DSM systems obtained by modifying mostly software DSM systems such that the hit miss check functionality is provided in software [70, 86]. Generally speaking, for applications where static software techniques cannot be effectively employed, increased use of software to provide shared memory functionality tends to decrease application performance because processor cycles spent implementing memory system functionality might ....

[Article contains additional citation context not shown here]

Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, and David A. Wood. Fine-grain Access Control for Distributed Shared Memory. In Proceedings of the Sixth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 297--306, October 1994.

....Second, if multiple writes to the same word are made between synchronization points, each write incurs this code overhead, whereas diff creation only captures the last write to each memory location. Other systems after Midway have used software dirty bits to provide fine grained access control [41, 42]. Munin [8, 13, 14] was the first software DSM system to make use of a relaxed consistency model. As outlined in Section 2.1.1, Munin s buffering of writes before a release operation resulted in substantial communication reduction over a similar sequentially consistent DSM system. Munin also ....

....allows the coherence granularity to vary across shared data structures. Shasta inlplenlents its version of fine grained access control by inserting code before each load or store to check if the data is available locally, conlnlunicating with other processes if necessary, as is done in Blizzard S [42]. Several techniques have been added to the basic check to reduce the runtinle overhead, including careful layout of the shared address space, explicit instruction scheduling of the checking code, and batching together checks for a nunlber of loads and stores sinlultaneously. Even though fine ....

I. Schoinas, B. Falsafi, A. Lebeck, S. Reinhardt, J. Larus, and D. Wood. Fine- grain access control for distributed shared memory. In Pr'oceedizgs of the Sixth Izterzatiozal Cozferezce oz Architectural Support for' Prograrnrnizg arid Oper'atirg Systems, pages 297 306, Oct 1994.

....On the other hand, if two access bits are assigned to 32 byte blocks of memory, then the ratio of data to extra bits is only 128:1. Schoinas points out that if a system already supports ECC, it is possible to avoid extra memory costs altogether by coding the access states with unused ECC values [Schoinas94]. The amount of extra logic required to implement memory access tags would not substantially complicate cache control logic because only two extra access state bits must be examined. This is unlikely to add to the critical path of a processor that must already check page level access (through a ....

Schoinas, I., Falsafi, B., Lebeck, A., Reinhardt, S., Larus, J., Wood, D. Finegrain access control for distributed shared memory. In Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems, San Jose, CA, ACM Press, 1994.

....2001 ACM 1 58113 346 4 01 0006 . 5.00. avoids false sharing, a common problem in DSM systems, but introduces overhead in the form of software access checks that detect absent or invalid cache entries. Most current fine grain DSM systems use binary rewriting tools to insert these checks [14, 25, 26]. Since the overhead of such checks is considerable, these systems analyze the binary code they rewrite and optimize by combining and removing checks. This paper investigates an alternative approach that we have used in the implementation of Jackal, a fine grain DSM system for the Java ....

I. Schoinas, B. Falsafi, A. Lebeck, S. Reinhardt, J. Larus, and D. Wood. Fine-grain Access Control for Distributed Shared Memory. In ASPLOS, pages 297--306, Oct. 1994.

....by invalidate and resend on access or by RMI style mechanisms, are inecient (re sending a large object or a log of operations (RMI) and often infeasible (especially if the methods require data available only on the server side) for data mining applications. Distributed shared memory systems [3, 5, 11, 29, 46, 44, 22, 24, 55] all support transparent sharing of data amongst remote processes, with ecient update propagation, but most require tight coupling of processes with sharing that is not address independent. None of the above systems support exible client controlled coherence, client controlled memory placement ....

I. Schoinas, B. Falsa, A. R. Lebeck, S. K. Reinhardt, J. R. Larus, and D. A. Wood. Fine-grain access control for distributed shared memory. In Proceedings of the 6th Symposium on Architectural Support for Programming Languages and Operating Systems, pages 297-306, October 1994.

....of such programs differ, many have highly regular sharing behaviors. The set of shared data accessed by individual threads is often invariant from one iteration to the next. This regular behavior can be used by DSMs to predict future accesses, and to move data in advance of subsequent accesses [4, 11, 12]. Such update protocols allow much of the latency of remote data fetches to be hidden. Given reasonably efficient communication, DSMs should be able to achieve good speedups on such applications. The output of parallelizing compilers, such as SUIF [13] is a good source for this type of ....

I. Schoinas, B. Falsafi, A. R. Lebeck, S. K. Reinhardt, J. R. Larus, and D. A. Wood, "Fine-grain Access Control for Distributed Shared Memory," in The Sixth International Conference on Architectural Support for Programming Languages and Operating Systems, October 1994.

....low cost, medium effort approach of inserting sequences of machine instructions into a program in executable or object format. We decided to use executable editing library (EEL) a library that was successfully used in several similar projects based on the UltraSPARC architecture, e.g. Blizzard S [38] and Sirocco S [36] The following code example shows the code snippet for one global floating point fine grain access control check. 1: ld [addr] reg original load 2: fcmps fcc0, reg, reg 3: nop 4: fbe,pt fcc0, hit 5: call global coherence load routine . hit: The magic ....

....CC NUMA architecture can do on the same platform. On average, our implementation demonstrates a relative difference for SPLASH 2 speedups of 31.6 compared to the hardware DSM implementation. 5 Related Work Many different SW DSM implementations have been proposed over the years: Blizzard S [38], Brazos [40] Cashmere 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 FFT LU c LU nc Radix Barnes FMM Ocean c Ocean nc Radiosity Raytrace Water nsq Water sp Average E6000 16 CPUs CC NUMA 2x8 DSZOOM WF 2x8 Figure 8: Application speedups for Sun Enterprise E6000, 2node CC NUMA, and 2 node ....

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I. Schoinas, B. Falsafi, A. R. Lebeck, S. K. Reinhardt, J. R. Larus, and D. A. Wood. Fine-grain Access Control for Distributed Shared Memory. In Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-VI), pages 297-- 306, October 1994.

....to check the index on all local pointer accesses. This would significantly degrade the performance of tasks that repeatedly accessed shared objects. It is worth noting that standard flat shared memory systems decouple the units of allocation and synchronization [Amza et al. 1996; Lenoski 1992; Shoinas et al. 1994]. Communication takes place using a flat shared address space, and synchronization takes place using locks and barriers. The locks and barriers are not explicitly coupled to any memory location, although of course such a coupling exists implicitly if the program is correctly synchronized. These ....

....with each processor. One of the Jade applications (the Volume Rendering application) actually fails to run on one platform because of this restriction. These problems highlight the advantages of systems that separate the units of allocation from the units of communication [Scales et al. 1994; Shoinas et al. 1994]. One alternative is to distribute fixed size pieces of objects across the memory modules and transfer pieces of objects on demand as processors access them. The shared memory implementation does this implicitly by using the shared memory hardware, which distributes pieces of objects across the ....

Shoinas, I., Falsafi, B., Lebeck, A., Reinhardt, S., Larus, J., and Wood, D. 1994. Finegrain access control for distributed shared memory. In Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems. ACM, New York.

....DSM (i.e. cache coherent non uniform memory access; CC NUMA) such as MIT Alewife[1] and SGI Origin 2000[2] to software DSM such as IVY[3] TreadMarks[4] and Shasta[5] There has also been some interesting approach for software based and hardware assisted systems. The examples include Blizzard E[12] using ECC bits while CASHMERe [13] project employing remote memory write. But, the ECC approach is restricted to only checking invalid state, while CASHMERe still requires a remote read mechanism to achieve higher performance. While these DSM approaches address the coherence problem for locally ....

I. Schoinas, B. Falsafi, A.R. Lebeck, S.K. Reinhardt, J.R. Larus, and D.A. Wood. Fine-grain access control for distributed shared memory. In Proc. of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems, pages 297--307, 1994.

....memory in the local node interrupts the compute processor. By contrast, Alewife can always handle local read misses to clean blocks without software handler overhead, but like in FLASH the miss has to go through a central node controller. A software only solution related to our work is Blizzard [19], which provides user level shared memory on a message passing machine without any hardware support for shared memory. Like our software only directory protocol, Blizzard invokes software handlers on the compute processors when a load or store to shared memory cannot be satisfied in the local ....

I. Schoinas, B. Falsafi, A. R. Lebeck, S. K. Reinhart, J. R. Larus, and D. A. Wood, "Fine-grain Access Control for Distributed Shared Memory," In Proceedings of the Sixth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-VI), pages 297-306, October, 1994.

....the order of a cache word, to reduce the likelihood that nodes will interfere with each other, and hence to reduce thrashing. The Tempest DSM also uses software detection to provide a small grain consistency unit. However, it provides sequential consistency by using the write invalidate protocol [50]. Split C supports explicit overlap of communication and computation [16] The language allows the programmer to overlap communication and computation. Because there is a delay (latency) between when the request for remote data is made and when the reply is received, the request should be made ....

Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, and David A. Wood. Fine-grain access control for distributed shared memory. In Sixth International Conference on Architecture Support for Programming Languages and Operating Systems, October 1994.

....run through a verification system prior to actual execution to detect possible error cases without having to manually rewrite the protocol in MurF s input language. The Teapot work was originally undertaken to aid protocol programmers in the context of the Blizzard distributed shared memory system[24]. Blizzard exports a cache coherence protocol programming interface to an application writer, so she can supply a coherence protocol that best suits the requirements of her application. Writing such protocols in C, without domain specific tools, turned out to be a difficult task, fraught with ....

Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, and David A. Wood. Fine-grain Access Control for Distributed Shared Memory. In Proceedings of the Sixth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS VI), pages 297-- 307, October 1994.

....Like SVM systems, these systems use address translation hardware to map shared addresses to local memory pages but enforce coherence at a finer granularity. FGDSM systems achieve performance competitive to SVM systems [ZIS 97] without having to resort to weak consistency models. Blizzard CM 5 [SFL 94] developed by the author and others for the TMC CM 5, was the first FGDSM system on messaging passing hardware. Blizzard COW 1 [SFH 96] which is its direct descendant, was developed on the Wisconsin Cluster of Workstations (COW) and is the focus of this thesis. Digital s Shasta [SGT96] is ....

.... by modifying the program s executable [LB94] The second, Blizzard E, uses the memory s error correcting code (ECC) bits as valid bits and the page protection to emulate read only bits [RFW93] The third, Blizzard ES, combines the two techniques using software lookups for stores and ECC for loads [SFL 94] The fourth, Blizzard T, uses Vortex, a custom fine grain access control accelerator board. The board was originally developed by members of the Wisconsin WindTunnel project [Pfi95] to demonstrate the simplest possible hardware Tempest implementation (Typhoon 0 [RPW96] Blizzard T explores the ....

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Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, and David A. Wood. Fine-grain access control for distributed shared memory. In Proceedings of the Sixth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS VI), pages 297-307, October 1994.

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Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, and David A. Wood. Fine-grain access control for distributed shared memory. In Proceedings of the Sixth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS VI), pages 297--307, October 1994.

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Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, and David A. Wood. Fine-Grain Access Control for Distributed Shared Memory. ACM SIGPLAN Notices, 29(11):297--306, 1994.

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I. Schoinas, B. Falsafi, A. Lebeck, S. Reinhardt, J. Larus, and D. Wood. Finegrain access control for distributed shared memory. In Conference on Architectural Support for Programming Languages and Operating Systems, pages 297--307, November 1994.

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I. Schoinas, B. Falsafi, A. R. Lebeck, S. K. Reinhardt, J. R. Larus, and D. A. Wood. Fine-grain access control for distributed shared memory. In Proc. of the 6th Symp. on Architectural Support for Programming Languages and Operating Systems (ASPLOSVI), pages 297--307, Oct. 1994. 8

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I. Schoinas, B. Falsafi, A. R. Lebeck, S. K. Reinhardt, J. R. Larus, and D. A. Wood. Fine-grain access control for distributed shared memory. In Proc. of the 6th Symp. on Architectural Support for Programming Languages and Operating Systems (ASPLOSVI), pages 297--307, Oct. 1994.

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I. Schoinas et al. Fine-grain access control for distributed shared memory. In ASPLOS, October 1994.

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I. Schoinas et al. Fine-grain access control for distributed shared memory. In ASPLOS, October 1994.

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I. Schoinas et al. Fine-grain access control for distributed shared memory. In ASPLOS, October 1994.

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I. Schoinas et al. Fine-grain access control for distributed shared memory. In ASPLOS, October 1994.

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Ioannis Schoinas, Babak Falsafi, Alvin R. Lebeck, Steven K. Reinhardt, James R. Larus, and David A. Wood. Fine-grain access control for distributed shared memory. In Proceedings of the 6th Conference on Architectural Support for Programming Languages and Operating Systems, pages 297--306, October 1994.

No context found.

I. Schoinas, B. Falsafi, A. R. Lebeck, S. K. Reinhardt, J. R. Larus, and D. A. Wood. Fine-grain Access Control for Distributed Shared Memory. In Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOSVI) , pages 297--306, October 1994.

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