L. Fournier, Y. Arbetman, and M. Levinger. Functional verification methodology for microprocessors using the Genesys test-program generator. In Proceedings of the 1999.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....processor functional verification is to ensure functional conformance of a processor design to its architectural and micro architectural specifications. One way to achieve this goal is to write test programs that check the functionality of the processor and run them on the design or its simulator [6, 9]. These tests typically contain at least a sequence of instructions to be executed, and possibly initial values and expected result values for architectural resources used by the instructions. The test programs are run by setting the initial values of the design s resources and executing the ....

L. Fournier, Y. Arbetman, and M. Levinger. Functional verification methodology for microprocessors using the Genesys test program generator - application to the x86 microprocessors family. In DATE99, Munchen, pages 434--441, 1999.

....processor functional verification is to ensure functional conformance of a processor design to its architectural and micro architectural specifications. One way to achieve this goal is to write test programs that check the functionality of the processor and run them on the design or its simulator [6, 9]. These tests typically contain at least a sequence of instructions to be executed, and possibly initial values and expected result values for architectural resources used by the instructions. The test programs are run by setting the initial values of the design s resources and executing the ....

L. Fournier, Y. Arbetman, and M. Levinger. Functional verification methodology for microprocessors using the Genesys test program generator - application to the x86 microprocessors family. In DATE99, Munchen, pages 434--441, 1999.

....processor functional verification is to ensure functional conformance of a processor design to its architectural and micro architectural specifications. One way to achieve this goal is to write test programs that check the functionality of the processor and run them on the design or its simulator [6, 9]. These tests typically contain at least a sequence of instructions to be executed, and possibly initial values and expected result values for architectural resources used by the instructions. The test programs are run by setting the initial values of the design s resources and executing the ....

L. Fournier, Y. Arbetman, and M. Levinger. Functional verification methodology for microprocessors using the Genesys test program generator - application to the x86 microprocessors family. In DATE99, Munchen, pages 434--441, 1999.

....out oforder and speculative executions. Verifying that the rules of the shared memory model (such as coherency and atomicity) are adhered to by the processor is a significant aspect of MP verification. Automatic test program generation plays an important role in current MP verification practice [5, 8, 10, 13, 4]. The generated test can include a specification of the test results that are to be expected if the design performs correctly. These results are predicted using a model of the design s architecture. Another approach is to use tools to monitor the design s execution while the test is being ....

L. Fournier, Y. Arbetman, and M. Levinger. Functional verification methodology for microprocessors using the Genesys test program generator - application to the x86 microprocessors family. In DATE99, Munchen, pages 434--441, 1999.

....[Software Engineering ] Testing and Debugging Testing tools General Terms Verification, Measurement, Algorithms, Experimentation Keywords Functional verification, Coverage analysis 1. INTRODUCTION Functional verification comprises a large portion of the effort in designing a processor [5]. The investment in expert time and computer resources is huge, as is the cost of delivering faulty products [3] In current industrial practice, most of the verification is done by generating a massive amount of tests using random test generators [1, 2] The use of advanced random test generators ....

L. Fournier, Y. Arbetman, and M. Levinger. Functional verification methodology for microprocessors using the Genesys test-program generator. In Proceedings of the 1999.

....how we went about the task of finding bugs in the Pentium 4 processor design prior to initial silicon, and what we found along the way. General Terms Management, Verification. 1. INTRODUCTION Validation case studies are relatively rare in the literature of computer architecture and design ([1] and [2] contain lists of some recent papers) and case studies of commercial microprocessors are even rarer. This is a pity, since there is as much to be learned from the successes and failures of others in the validation area as in other, more richly documented, fields of computer engineering. ....

Fournier, L, Arbetman, Y and Levinger, M: "Functional Verification Methodology for Microprocessors Using the Genesys Test-Program Generator - Application to the x86 Microprocessors Family", Proceedings of the Design Automation and Test in Europe Conference and Exhibition (DATE99), March 1999.

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L. Fournier, Y. Arbetman, M. Levinger: "Functional Verification Methodology for Microprocessors Using the Genesys Test Program Generator". Application to the x86 Microprocessors Family. DATE99, Munchen, 1999.

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L. Fournier, Y. Arbetman, and M. Levinger. Functional verification methodology for microprocessors using the Genesys test-program generator. In Proceedings of the 1999.

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