Jyh-Charn Liu and Hung-Ju Lee. Deterministic Upperbounds of the Worst-Case Execution Times of Cached Programs. IEEE Real-Time Systems Symposium, 1994. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Comparing Caching Techniques for Multitasking Real-Time Systems - Dropsho, Weems (1997) (Correct)
....system dependent, and delimits the conditions where each policy works well. 2 Related Work Much of the research in real time predictable cache behavior has focussed on analyzing an application s behavior with respect to a uniprocess system that does not suffer interprocess contention for the cache [13, 10, 14, 7, 5]. For a multitasking environment, two basic methods have been proposed for controlling interprocess cache interference for predictable cache behavior. The first method relies on dividing the cache into distinct partitions and the other restricts where context switches can occur. Kirk and ....
Jyh-Charn Liu and Hung-Ju Lee. Deterministic Upperbounds of the Worst-Case Execution Times of Cached Programs. IEEE Real-Time Systems Symposium, 1994.
Worst-Case Timing Analysis of Concurrently Executing DMA I/O and.. - Huang (1997) (1 citation) (Correct)
....instruction is fixed does not hold on contemporary machines. To bound the WCET of a program executed on such a machine, we must study the timing predictability of dynamic architectural features. Cache memory and instruction pipeline are two features on which much research has focused. Liu and Lee [27] argued that a sufficient condition for determining the tightest WCET of a cached program is to search through all feasible paths exhaustively. They proposed a method that trades off between the tightness of the WCET bound and its computing time. Kirk and Strosnider [13, 14, 15] proposed a cache ....
Jyh-Charn Liu and Hung-Ju Lee. Deterministic upperbounds of the worst-case execution times of cached programs. In Proceedings of the 15th Real-Time Systems Symposium, pages 182--191, December 1994.
Efficient Microarchitecture Modeling and Path Analysis for.. - Li, Malik, Wolfe (1996) (45 citations) (Correct)
....and a new cache analysis is required. This often leads to explicit enumeration of program paths. Data cache analysis is even more difficult because some data addresses may not be determined statically. Several WCET analysis with instruction cache modeling methods have been proposed. Liu and Lee [5] note that a sufficient condition for determining the exact worst case cache behavior is to search through all feasible program paths exhaustively. This becomes an intractable problem whenever there is a conditional statement inside a while loop, which unfortunately happens frequently. Lim et al. ....
Jyh-Charn Liu and Hung-Ju Lee, "Deterministic upperbounds of the worst-case execution times of cached programs", in Proceedings of the 15th IEEE Real-Time Systems Symposium, December 1994, pp. 182--191.
Performance Estimation of Embedded Software with Instruction .. - Li, Malik, Wolfe (1995) (37 citations) (Correct)
....general undecidable and is equivalent to a halting problem. The sufficient conditions for it to be decidable are: i) no recursive function calls, ii) no dynamic structures and (iii) bounded loops [2] Several WCET analysis with instruction cache modeling methods have been proposed. Liu and Lee [3] note that a sufficient condition for determining the exact worst case cache behavior is to search through all feasible program paths exhaustively. This becomes an intractable problem whenever there is a conditional statement inside a while loop, which unfortunately happens frequently. Lim et al. ....
Jyh-Charn Liu and Hung-Ju Lee, "Deterministic upperbounds of the worst-case execution times of cached programs ", in Proceedings of the 15th IEEE Real-Time Systems Symposium, December 1994, pp. 182--191.
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