A. Dancy and A. Chandrakasan, "A reconfigurable dual output low power digital PWM power converter," in International Symposium on Low Power Electronics and Design, (Monterey, CA), pp. 191--196, Aug. 1998.  Home/Search   Document Details and Download   Summary   Related Articles

....non homogeneous circuits have clearly separated blocks of logic with different performance constraints. Each of the individual blocks can then be separately optimized for V dd and V th and the various supply voltages can be obtained by using efficient DC DC power conversion circuits [65] [22], while the different thresholds can be obtained by processing steps or by substrate biasing. The high V dd side can directly drive the low V dd circuits but there is a need for level conversion in the other direction [73] 42] There is a recent patent on a logic synthesis approach to place the ....

....delay requirements [1] C. Continuous Non Stationary Circuits Circuits that have dynamically changing performance requirements can still be operated in an optimal fashion if their V dd and V th can be dynamically changed on demand [53] This requires efficient variable DC DC power conversion [22], 65] 25] and circuit styles that permit variable clock frequencies [75] Typically the V th is obtained by back biasing, either under biasing [69] or over biasing [77] The concept of self clocking was proposed for such circuits [51] 75] by which the clock frequency and supply voltage ....

A. Dancy and A. Chandrakasan, "A reconfigurable dual output low power digital PWM power converter," in International Symposium on Low Power Electronics and Design, (Monterey, CA), pp. 191--196, Aug. 1998.

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