Infineon Technologies AG. "8 %&8S9r...vo/ooh#vo/oor+# %#7v#Tvtyr#8uvfHvp...'p'#...'yyr...#V+r...+Hhhy". Version 3.1, March 2000.  Home/Search   Document Not in Database   Summary   Related Articles

....due to some of the already explained reasons. The target under test, the Infineon C167CR 16 Bit Single Chip Microcontroller from Infineon, is suited for realtime embedded control applications. It has been optimized for high instruction throughput and minimum response time to external interrupts [6]. It is also important that the execution times of instructions do not vary they do not depend on their inputs. The C167 processor uses a relatively simple four stage pipeline. There is no cache memory, except for a specific jump cache that stores the target instruction of the last taken ....

....execution time of the instruction sequence is less than documented. The observed jump cache behavior differed slightly from the one described in documentation. Our observations were then confirmed by the hardware manufacturer and showed a vagueness in the manual concerning the jump cache. In [6], the jump cache of the C167 is documented as follows: D p #. h # # #hqh. q i. hpu v #. p#v # #ur #h. tr# v #. p# #v s h phpur wf v #. p#v v hqqv#v hyy # . rq v #ur phpur hs#r. uho oovt irr sr#purq# 6s#r. rhpu . rfrh#rqy s yy ## ....

Infineon Technologies AG. "8 %&8S9r...vo/ooh#vo/oor+# %#7v#Tvtyr#8uvfHvp...'p'#...'yyr...#V+r...+Hhhy". Version 3.1, March 2000.

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