S. Vassiliadis, B. Juurlink, and E. A. Hakkennes, "Complex streamed instructions: introduction and initial evaluation," Proc. IEEE Euromicro Conf., vol. 1, pp. 400-408, Sep. 2000.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....frequencies. Similarly, the address generation stage needs to be divided into three pipe stages to achieve frequencies greater than 1 GHz. 6 Related Work Corbal et al. 36] proposed to exploit DLP in two dimensions instead of one dimension as in current SIMD extensions. Vassiliadis et al. [37][38] have concurrently proposed the Complex Streamed Instruction set (CSI) that can exploit two levels of looping. Though they are able to eliminate some overhead because each of their complex instructions can eliminate two loops, our results show that more overhead can be eliminated with 5 loops. ....

S. Vassiliadis, B. Juurlink, and E. A. Hakkennes, "Complex streamed instructions: introduction and initial evaluation," Proc. IEEE Euromicro Conf., vol. 1, pp. 400-408, Sep. 2000.

....SIMD extensions) a simple in order long vector allows for potential saving in chip area and achieves better multimedia performance. However, it is important to have a general purpose processor to achieve sustained performance on different domains of workloads. Vassiliadis, et al. 50][106] have proposed the Complex Streamed Instruction Set (CSI) to enhance an existing out of order GPP. A stream computa 30 tion instruction can capture two levels of loop nesting. Vermuelen, et al. 107] describe how DCT, Reed Solomon code, and other similar media oriented operations can be enhanced ....

S. Vassiliadis, B. Juurlink, and E. A. Hakkennes, "Complex streamed instructions: introduction and initial evaluation," Proc. IEEE Euromicro Conf., vol. 1, pp. 400-408, Sep. 2000.

No context found.

S. Vassiliadis, B. Juurlink, and E. Hakkenes. Complex Streamed Instructions: Introduction and Initial Evaluation. In EUROMICRO 26, 2000.

No context found.

S. Vassiliadis, B. Juurlink, and E. Hakkennes. Complex Streamed Instructions: Introduction and Initial Evaluation. In Proc. EUROMICRO 26, pages 400--408, 2000.

No context found.

S. Vassiliadis, B. Juurlink, and E. Hakkennes. Complex Streamed Instructions: Introduction and Initial Evaluation. In EUROMICRO 26, 2000.

....issue width. This makes the CSI architecture highly suitable for embedded systems, where high issue rates and out of order issue and execution are too expensive. The same observation has been made in [6] for the MOM ISA extension. 5 Related Work The CSI architectural paradigm was introduced in [29]. Since then we modified the architecture in order to accommodate more instructions using fewer opcodes. This is accomplished using the stream control registers. Furthermore, we significantly extend the work described in [29] by providing results for several other benchmarks, by including a ....

....5 Related Work The CSI architectural paradigm was introduced in [29] Since then we modified the architecture in order to accommodate more instructions using fewer opcodes. This is accomplished using the stream control registers. Furthermore, we significantly extend the work described in [29] by providing results for several other benchmarks, by including a detailed simulation of the memory hierarchy and by providing a comparison with VIS. In [29] just one benchmark application was considered (an MPEG encoder) and the effect of cache misses was imitated by varying the latencies of ....

[Article contains additional citation context not shown here]

S. Vassiliadis, B. Juurlink, and E. Hakkenes. Complex Streamed Instructions: Introduction and Initial Evaluation. In EUROMICRO 26, 2000.

No context found.

S. Vassiliadis, B. Juurlink, and E. A. Hakkennes, "Complex streamed instructions: introduction and initial evaluation," Proc. IEEE Euromicro Conf., vol. 1, pp. 400-408, Sep. 2000.

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC