H. Levy and R. Eckhouse, Jr., Computer Programming and Architecture: The VAX-11, Digital Press, 1980. 41  Home/Search   Document Not in Database   Summary   Related Articles   Check

....Figure 10: A typical address space in EMERALDS. Area labeled kernel stack is used for interrupts and area labeled user stack is used by both the user and the kernel. distinguish unmapped and swapped out pages. VAX VMS uses the page table length register of the VAX 11 to achieve the same goal [42]. But depending on such hardware support in embedded systems is not feasible since it increases hardware costs. The small size of page tables not only saves memory, but also enables other optimizations like mapping the kernel into every address space. A typical 32 bit EMERALDS address space is ....

H. Levy and R. Eckhouse, Jr., Computer Programming and Architecture: The VAX-11, Digital Press, 1980. 41

....in 1970 s and the system software was taught following the text [27] describing the system software of this machine. This text is still in use in a Pascal disguised form [8] The Vax 11 780 architecture that provides our third example has dominated the decade 1980 1990 and is best described in [55]. Section 3.5 is dedicated to memory data representation. Again, rationale for managing memory as data and the concept of a memory block are considered first. Then a memory manager that manipulates lists of free blocks of memory is discussed and the memory management system is suggested as a data ....

....style of memory management. Section 3.6 is dedicated to the discussion of I O data representation. We were prompted to write this section by the lack of information regarding the use of I O operations in the Unix system. Again, there are few books covering these topics, the best of which being [55]. Section 3.7 illustrates the problems faced by system pro 216 Process and resource representation grammers in developing I O programs. The I O programming for the Mix Machine, IBM 360 370, and PDP 11 provide the examples of this section. Finally, Section 3.8 discusses the tools that transform ....

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H.M. Levy. Computer Programming and Architecture -- The Vax-11. Digital Press, 1980.

....hand clears reference bits, and the second samples them to consider frames for pageout. Thus the distance between the two hands, rather than the number of frames, determines the frequency of sampling. Another approximation to LRU is FIFO with second chance[Turner Levy 81] used in the VMS [Levy Eckhouse, Jr. 88] and Mach operating systems. This policy keeps frames on three FIFO queues, the active queue, the inactive queue, and the free queue. When a frame reaches the head of the FIFO queue, its reference bit is cleared and it is put at the tail of the inactive queue. Frames to be reclaimed are taken ....

Henry M. Levy and Richard H. Eckhouse, Jr. Computer Programming and Architecture: The VAX. Digital Press, 2nd edition, 1988.

....scheduling and I O, and use interrupt masking to guarantee integrity of system resources shared across interrupt levels. This approach was efficient in many previous processor architectures (e. g, VAX) where the cost changing interrupt levels was small generally less than ten instructions [4, 5]. In modern architectures, however, interrupt masking may be up to an order of magnitude more expensive, contributing to poorer performance of system code. Optimistic interrupt protection avoids the performance penalty of interrupt mask manipulation while preserving the semantics of the interrupt ....

....events. Access to a potentially concurrent data is protected by setting the processor interrupt level to prevent all events that could potentially alter the data in question. Interrupt masking has been used successfully in a large number of operating systems, including Mach, Unix, VMS, and NT [6, 7, 5, 8]. It maps well onto a diverse array of hardware, from systems with a single interrupt level to processors with a rich interrupt structure [9, 10] On a uniprocessor, no additional synchronization constructs are required. An important property of the interrupt masking model is that ....

Henry M. Levy and Richard H. Eckhouse. Computer Programming and Architecture: The VAX-11 (2nd Edition). Digital Press, Bedford, MA, 1989.

....Big Endians) data format. There are 4 major different floating point formats in use today by computer vendors. ffl IEEE, the IEEE 754 floating point standard; ffl CRAY, the standard for CRAY supercomputers (but CRAY Superservers use the IEEE format) ffl DEC, the standard for its VAX machines [11] and followers; ffl IBM, the standard of IBM mainframes and followers. Table 1 shows that the IEEE standard covers more than 85 (35 out of 41) of all the architecture types supported by PVM. Some frequently used machines in high performance computing community with different floating point ....

H. Levy, R. Eckhouse, Jr. Computer programming and architecture: the VAX, Digital Press, Cop., 1989.

....and I O, and use interrupt masking to guarantee integrity of system resources shared across interrupt levels. This approach was efficient in many previous processor architectures (e. g, VAX) where the cost changing interrupt levels was small generally less than ten instructions [Morse et al. 82, Levy Eckhouse 89] In modern architectures, however, interrupt masking may be up to an order of magnitude more expensive, contributing to poorer performance of system code. This research was sponsored in part by The Advanced Research Projects Agency, Information Science and Technology Office, under the title ....

....data is protected by setting the processor interrupt level to prevent all events that could potentially alter the data in question. Interrupt masking has been used successfully in a large number of operating systems, includingMach, Unix, VMS, and NT [Accetta et al. 86, Leffler et al. 89, Levy Eckhouse 89, Custer 93] It maps well onto a diverse array of hardware, from systems with a single interrupt level to processors with a rich interrupt structure [Bell et al. 82, Intel 90] On a uniprocessor, no additional synchronization constructs are required. An important property of the interrupt masking ....

Levy, H. M. and Eckhouse, R. H. Computer Programming and Architecture: The VAX-11 (2nd Edition). Digital Press, Bedford, MA, 1989.

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Levy, H. M. and Jr., R. H. E. Computer Programming and Architecture: The VAX-11. Bedford, Mass., Digital Press, 1980.

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Henry M. Levy and Richard H. Eckhouse, Jr. Computer Programming and Architecture: The VAX. 2nd Ed. Digital Press, 1988.

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Levy, H. M. and Eckhouse, R. H. Computer Programming and Architecture: The VAX-11 (2nd Edition). Digital Press, Bedford, MA, 1989.

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