C. Fagot, O. Gascuel, P. Girard and C. Landrault, "On calculating efficient LFSR seeds for built-in self test", Proc. IEEE European Test Workshop 1999. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Low-Overhead Built-In Bist Reseeding - Ahmad Yamani And (Correct)
....for reusing the scan chain flip flops as an LFSR. In [Lempel 95] an analytical method was presented for computing a single seed for random pattern resistant circuits using an LFSR with a given polynomial. The complexity of the given procedure quickly increases with the number of inputs. In [Fagot 99] a simulation scheme for calculating initial seeds for LFSRs was presented. The scheme is based on simulating several sequences that include a set of ATPG vectors. The above schemes assume a single seed. Having several seeds should increase the fault coverage with the same test length if the ....
Fagot, C., O. Gascuel, P. Girard and C. Landrault, "On Calculating Efficient LFSR Seeds for Built-In Self Test," Proc. of European Test Workshop, pp. 7-14, 1999.
Novel Spectral Methods for Built-In Self-Test in a.. - Giani, Sheng, Hsiao.. (2001) (Correct)
....the pseudo random patterns [7, 9] is done using counter based schemes [10,11] or performing bit fixing (pattern mapping) 12] The disadvantages are additional area and delay overheads. One way to overcome these drawbacks is to design the LFSR by selecting good seed and feedback polynomial [13 17]. However, test sequences with acceptable test length and fault coverage are obtained at the expense of area overhead required to store seeds. Also, the complexity of computation of the seeds [17] rapidly increases with the number of primary inputs. Efficient hardware pattern generators [6,8] ....
....to overcome these drawbacks is to design the LFSR by selecting good seed and feedback polynomial [13 17] However, test sequences with acceptable test length and fault coverage are obtained at the expense of area overhead required to store seeds. Also, the complexity of computation of the seeds [17] rapidly increases with the number of primary inputs. Efficient hardware pattern generators [6,8] often round off optimal weights, hence producing patterns that are sub optimal for certain circuits. In sequential circuits, faults may need a biased internal state in addition to biased input ....
C. Fagot, O. Gascuel, P. Girard and C. Landrault, "On calculating efficient LFSR seeds for built-in self-test," Proc. European Test Workshop, pp. 7-14, 1999.
Hidden Markov and Independence Models with Patterns for.. - Laurent Brehelin Olivier Self-citation (Gascuel Girard Landrault) (Correct)
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C. Fagot, O. Gascuel, P. Girard, and C. Landrault. On calculating efficient LFSR seeds for built-in self test. In IEEE ETW, May 1999.
A Ring Architecture Strategy for BIST Test Pattern.. - Fagot, Gascuel, Girard, .. (2003) (1 citation) Self-citation (Fagot Gascuel Girard Landrault) (Correct)
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C. Fagot, O. Gascuel, P. Girard, and C. Landrault, "On Calculating Efficient LFSR Seeds for Built-In Self Test," IEEE European Test Workshop, pp. 7--14, 1999.
Improvement of the Fault Coverage of the Pseudo-Random Phase - In Column-Matching Bist (Correct)
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C. Fagot, O. Gascuel, P. Girard and C. Landrault, "On calculating efficient LFSR seeds for built-in self test", Proc. IEEE European Test Workshop 1999.
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