| D. Folegnani and A. Gonz alez. Energy-efficient issue logic. In Proceedings of the 28th Annual Symposium on Computer Architecture, 2001. |
....For lack of space, we only mention some of the most closely related work and focus on how it differs from our approach. A large amount of work has been done on hardware adaptation to save energy, using dynamic voltage (and frequency) scaling or DVS (e.g. 37] and architectural adaptation (e.g. [26, 1, 9]) Most of this work, however, has not considered adaptive real time applications, adaptive network protocols, bandwidth driven adaptations, and or interactions with the temporal scheduler. Adaptive applications for mobile computing have focused on changes in available bandwidth [10, 36, 6, 28, ....
D. Folegnani and A. Gonz alez. Energy-Efficient Issue Logic. In Proc. of the 28th Intl. Symp. on Comp. Architecture, 2001.
....at least two forms of hardware adaptation. The first is dynamic voltage scaling (DVS) 10, 11, 12, 20, 25, 26, 27, 29] Reducing voltage reduces energy, but also requires reducing frequency, increasing execution time. The second technique adapts the architecture to reduce the effective capacitance [1, 8, 9, 17, 22, 23]. Since a lower effective capacitance often results in a lower IPC and vice versa, a net reduction in energy results only if the ratio of the two terms is reduced. Further, reducing IPC increases execution time. 1 The energy equation assumes dynamic power is dominant, as in current systems. ....
....in energy results only if the ratio of the two terms is reduced. Further, reducing IPC increases execution time. 1 The energy equation assumes dynamic power is dominant, as in current systems. Examples of architectural adaptations are speculation control [22] changing instruction window size [8], changing the number of functional units [23] switching issue strategy between in order and out of order [9] and shutting off parts of the cache [1] Most studies have considered only one of these forms of adaptation (e.g. 1, 8, 9, 10, 11, 20, 22, 23, 25, 26, 27, 29] and most studies of ....
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D. Folegnani and A. Gonz alez. Energy-Efficient Issue Logic. In Proc. of the 28th Annual Intl. Symp. on Comp. Architecture, 2001.
No context found.
D. Folegnani and A. Gonz alez. Energy-efficient issue logic. In Proceedings of the 28th Annual Symposium on Computer Architecture, 2001.
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D. Folegnani and A. Gonzalez. Energy-efficient issue logic. In Proceedings of the 28th Annual Symposium on Computer Architecture, 2001.
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D. Folegnani and A. Gonzalez. Energy-efficient issue logic. In International Symposium on Computer Architecture, pages 230--239, Gothenburg, Sweden, June--July 2001.
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D. Folegnani and A. Gonzalez. Energy-efficient issue logic. In International Symposium on Computer Architecture, pages 230--239, Gothenburg, Sweden, June--July 2001.
No context found.
D. Folegnani and A. Gonz alez. Energy-Efficient Issue Logic. In Proc. of the 28th Annual Intl. Symp. on Comp. Architecture, 2001.
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