A. Sama, M. Balakrishnan, and J. F. M. Theeuwen, "Speeding up power estimation of embedded software," in Proc. Int. Symp. Low Power Electronics & Design, Aug. 2000, pp. 191--196. Home/Search Document Details and Download
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Energy Estimation for Extensible Processors - Fei, Ravi, Raghunathan, Jha (2003) (1 citation) (Correct)
....actual current measurements for a processor chip executing carefully created test programs [13] The techniques in [14] measure the instantaneous processor power to build a software energy estimation model. The accuracy of instruction level modeling is improved further by the techniques in [15] [16], 17] which are cognizant of variations due to instruction encoding, addressing mode, register fields, operands values, bit toggling on internal and external busses, etc. Since the added accuracy comes at the cost of additional CPU time, efficiency is targeted in [16] 18] which perform ....
....by the techniques in [15] 16] 17] which are cognizant of variations due to instruction encoding, addressing mode, register fields, operands values, bit toggling on internal and external busses, etc. Since the added accuracy comes at the cost of additional CPU time, efficiency is targeted in [16], 18] which perform measurement only on a subset of the instructions (for base energy) and instruction sequences (for inter instruction effects) Measurement based approaches are accurate because data are acquired from an actual chip implementation. The same reason, however, makes measurement ....
A. Sama, M. Balakrishnan, and J. F. M. Theeuwen, "Speeding up power estimation of embedded software," in Proc. Int. Symp. Low Power Electronics & Design, Aug. 2000, pp. 191--196.
Pre-characterization Free, Efficient Power/Performance.. - Rapaka, Marculescu (Correct)
....of their software and architectural innovations. A designer can make a choice from a variety of simulators to estimate the power consumption and performance, which are at various levels of abstraction ranging from transistor or layoutlevel [1] to architectural [2, 3] and instruction level [4, 5, 6, 7]. The lowest level simulators provide the most detailed and accurate statistics, while the higher level simulators trade off accuracy for simulation speed and portability. Although high level simulators offer high speedup when compared to low level simulators, they are still time consuming and may ....
A. Sama, M. Balakrishnan and J. F. M. Theeuwen, `Speeding up Power Estimation of Embedded Software,' in Proc. Int. Symp. Low Power Electronics and Design, Rapallo, Italy, 2000.
High-level Software Energy Macro-modeling - Tan, Raghunathan.. (2001) (3 citations) (Correct)
....In this paper, we propose an embedded software energy estimation methodology to address the above issues, based on the use of characterization based macro modeling. 1. 1 Related Work Power analysis techniques have been proposed for embedded software based on instruction level characterization [3, 6, 14, 15, 18] and simulation of the processor architecture [4, 11, 16, 19] Initial work on instruction level power modeling and analysis was done in [18] where energy consumption of an embedded software program was computed by summing base energy costs fbr individual instructions, circuit state overhead ....
....overhead costs for consecutive instruction pairs, and additional penalties due to effects such as pipeline stalls and cache misses. The accuracy of this method was improved by accounting for data dependencies including the effects of instruction and data addresses, register IDs, and operand values [6, 15]. Its efficiency was improved by performing measurements on a limited subset of instructions and in struction sequences [3, 15] A complementary set of approaches to embedded software power analysis is based on the use of cycle accurate and structure aware architectural simulators. Such simu ....
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A. Sama, M. Balakrishnan, and J. F. M. Theeuwen. Speeding up power estimation of embedded software. In Proc. Int. Syrup. Low Power Electronics and Design, pages 191 196, Aug. 2000.
Low-Energy DSP Code Generation Using a Genetic Algorithm - Lorenz, Leupers.. (2001) (Correct)
.... Lee et al. published an instruction level power model based on measurement of the energy consumption of a single instruction (base energy cost) and of the switching activities of successive instructions (overhead energy cost) 13] Further power models based on that work can be found e.g. in [21, 20]. It is already known (and is also confirmed by our power estimation for the M3 DSP in section 3) that the number of memory accesses has a more significant contribution to power consumption than other processor instructions. However, most traditional code generation techniques are based on tree ....
A. Sama, M. Balakrishnan, and J. F. M. Theeuwen. Speeding upPower Estimation of Embedded Software. In Proceedings of International Symposium on Low Power Electronics and Design, 2000.
Energy Estimation for Extensible Processors - Yunsi Fei Srivaths (2003) (1 citation) (Correct)
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A. Sama, M. Balakrishnan, and J. F. M. Theeuwen, "Speeding up power estimation of embedded software," in Proc. Int. Symp. Low Power Electronics & Design, Aug. 2000, pp. 191--196.
A Hybrid Energy-Estimation Technique for Extensible.. - Fei, Ravi, Raghunathan, Jha (2004) (Correct)
No context found.
A. Sama, M. Balakrishnan, and J. F. M. Theeuwen, "Speeding up power estimation of embedded software," in Proc. Int. Symp. Low Power Electron. Design, Aug. 2000, pp. 191--196.
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