C. B. S. Traw and J. M. Smith, A High-Performance Host Interface for ATM Networks, Proceedings ACM SIGCOMM '91, Zurich, September 1991.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....transputers, extends this idea and provides independent optimised paths from each of the multimedia devices to the network interface. An example of non multimedia specific high speed network interfacing for existing workstations is provided by work in the Aurora project [Davie,91] Traw,91] The Aurora interfaces offer considerable performance improvements over conventional interfaces by offioading segmentation and reassembly tasks from the host. The Nectar system [Arnould,89] extends this approach to include sophisticated protocol processors which also aim to offioad the transport ....

Traw C., Smith J., "A High-Performance Host Interface For ATM Networks" Proc SIGCOMM'91, Zurich, Switzerland ISBN 0 89791 444 9, pp 317325, September 1991.

....with a large on board buffer memory [48] The WITLESS design was used by a group at HP Labs in Bristol in a series of network adapters including Medusa [18] Afterburner [28, 52] and Jetstream [38] Two more high performance network adapters were developed at about the same time. Traw and Smith [74, 75, 76] implemented an adapter for the IBM RS 6000 and Davie [29, 30, 31] implemented one for DEC workstations. The performance of TCP implementations have been extensively studied, most notably by Clark et al. 26] One important conclusion from their analysis was that message copying contributed to a ....

C. Brendan S. Traw and Jonathan M. Smith. A high-performance host interface for ATM networks. In SIGCOMM '91 Conference Proceedings, pages 317--325, Zurich, Switzerland, September 3--6, 1991. ACM SIGCOMM Computer Communication Review, 21(4).

....buffer memory accessible both by the host CPU and the transmit receive engines. They do not use DMA to transfer data between the host main memory and the interface the CPU is used instead. A more traditional design is the ATM host network interface developed by the University of Pennsylvania [17][18] for the AURORA gigabit test bed. Their interface is designed for the IBM Microchannel bus and the RS 6000 workstation using DMA to transfer data between main memory and the interface board. The Bellcore ATM interface is another example of a similar design [5] 6] Another approach is the ....

C. Brendan S. Traw and Jonathan M. Smith. A high-performance host interface for ATM networks. In SIGCOMM '91 Conference Proceedings, pages 317--325, Zrich, Switzerland, September 3--6, 1991. ACM SIGCOMM Computer Communication Review, 21(4).

....has been suggested as an implementation technology for local as well as wide area networks [2] 4] 12] ATM messages are of fixed length. Each is 53 bytes long with five bytes reserved for header, leaving a 48 byte payload. Several teams are creating prototype ATM host interfaces and networks[2] 7][20]. The Autonet follow on, AN2, will have ATM switches [14] ATOMIC sends variable length packets and it uses the distributed computational and routing capability of a mesh. This sets ATOMIC well apart from ATM based LANs. The fragmentation and reassembly required when ATM carries higher layer ....

Traw, S.B.C, Smith, J.M. "A High-Performance Host Interface for ATM Networks", Proceedings of SIGCOMM-91, pp. 317-325, August 1991.

....performance possible by eliminating checksum, bcopy, and various select related functions which a kernel VISA TCP implementation would not use and listed this in table 5 as faster TCP . The per packet costs are a significant concern, but we see only a 10 throughput drop from 8KB Myrinet packets to 1500 byte ethernet packets. 7 Potential Performance Improvements Basic functionality at a reasonable data rate has been demonstrated. Nevertheless, it is clear from these performance numbers that host operating systems need substantial tuning to be efficient for the types of transfers common in ....

.... processors moves in cycles over time; they referred to this as the wheel of reincarnation [MS68] Over the last decade, numerous hardware experiments were conducted and suggestions were made for putting more functionality into the network adapter [Kan88, CSSZ90, Che87, Sid91, DWB 93, Dav91, TS91, BJM 96, SWR91, BPP91, DPD91, TP96] Most of the more radical features have not been accepted into mainstream adapters. Some of these approaches have not been adopted into the mainstream because they are specific to Open Systems Interconnection (OSI) or other protocols. Others have failed ....

C. Brendan Traw and Jonathan M. Smith. A high-performance host interface for ATM networks. In Proc. SIGCOMM '91 [ACM91], pages 317--325.

.... at Bellcore uses a flexible design with a combination of custom hardware and a pair of Intel 960 processors, one for transmitting and one for receiving [27] 28] At the University of Pennsylvania, an interface for an IBM RS 6000 is designed that consists entirely of dedicated hardware [12] [83]. All cell processing is done in hardware on the interface board and the interface uses clocked interrupts for its state exchange protocol. In May 1993, end to end communication was established between the host interfaces designed at Bellcore and the University of Pennsylvania. The communication ....

C.B.S. Traw and J.M. Smith, "A High-Performance Host Interface for ATM Networks", In Proc. ACM SIGCOMM `91, Zurich, Sep. 1991.

....HOST AIB HOST AIB HOST AIB HOST AIB HOST AIB . cluster1 cluster0 cluster n cluster2 . ATM Network . HOST AIB S S S S S S S S S: switch Figure 1: Overview of An ATM LAN. high speed data transfer between host and network. There have been several interfaces designed for ATM networks [8][9][10] Comparing AIB with the existing designs, we can highlight the following three improved features. Firstly, we design a DM CA (Direct Memory Cache Access) controller to access host s cache when there is a cache hit, or host s memory with a cache miss. Secondly, the DM CA has an internal ....

Traw,C.B.S.et al.,"A High Performance Host Interface for ATM Networks," Proc. of SIGCOMM '91.

....CPU interfaces. Given different network and processor technologies, the relative importance of these components may change; by isolating the components, we can see how the performance of each scales with technology change. Controllers targeted for high throughput have been well studied in the past [5, 24, 38, 68]. However, latency is often the overriding concern in distributed systems, and consequently, for the most part, this chapter considers the impact of the controller on this aspect of communication performance. Given the increases in processor and network speed, it is natural to hypothesize that low ....

....example, on a 155 Mbit sec ATM network, individual cells, which are fixed size 53 byte packets, can arrive at the host once every 2.7 microseconds. In order to isolate the host from frequent interrupts and protocol processing overheads, some designs migrate functionality into the controller [24, 68]. However, the migration of too much functionality into the controller can impact the latency of processing network messages. In addition, if the controller presents a complex interface to the host, there could be additional software latency introduced by the host device driver in managing the ....

C. Brendan S. Traw and Jonathan M. Smith. A high-performance host interface for ATM networks. In Proceedings of the 1991 SIGCOMM Symposium on Communications Architectures and Protocols, pages 317--325, September 1991.

....projects such as VMTP [23] and x kernel [24] represent examples of numerous efforts to construct frameworks for high performance transport protocol implementations. In order to further improve efficiency, new ATM host network interface designs have been proposed by Davie [25] Traw and Smith [26], and Moors and Cantoni [27] where the software bottleneck is reduced by providing hardware support for several aspects of protocol processing. Other researchers are investigating parallel computing on ATM networks. Although we have concentrated on collective communication in this paper, readers ....

C. B. S. Traw and J. M. Smith, "A high-performance host interface for ATM networks," ACM Communication Review, pp. 317--325, 1991.

....processor speed eliminated the original motivations for intelligent network adapters at the time. There has been a great deal of work, however, in offloading pieces of network protocols. For example, there has been work to offload Internet checksum calculations [30, 39, 40] link layer processing [41 45], and packet filtering [8, 46] Interestingly, the tide might be turning again: recently published results show that offloading TCP IP to intelligent network adapters yields better performance for an enterprise wide server system running Windows NT [47] In recent years, researchers from the ....

C.B. Traw and J.M. Smith. "A High-performance Host Interface for ATM Networks." In Proceedings of the ACM SIGCOMM '91 Symposium on Communication Architectures and Protocols. 1991.

....implement interactive media applications over the long haul. The design of the AVlink allows the LAN WAN boundary to appear seamless to clients on either side of the interface. 3. 6 Host Interfaces Many host interfaces in other systems provide support for packet reassembly [8, 13] and streaming [8, 18]. In many of these host interfaces which support packet reassembly, the interface provides buffering on a per VCI basis and only interrupts the processor when full packets are received. This approach is similar to the approach many have taken with video that is, to provide specialized hardware ....

C. Traw, "A High-Performance Host Interface for ATM Networks," ACM, 1991, pp. 317-325.

....DEC turbochannel 32 bits x 25 MHz. 32 bits x 25 MHz. Turbochannel Option Rom Xilinx Boot Xilinx Boot ROM ROM Figure 2: Block diagram of the Yes V2 option module 6.1 Previous ATM interfaces for workstations. ATM interfaces for Unix workstations have been reported by Davie [3] and Traw [18]. These are both high functionality interfaces. Traw s controller adapts ATM cells on a 155 Mbit s SONET STS 3 carrier to an IBM RS 6000 Microchannel and performs sorting of received cells in microcoded hardware. However it does not implement reassembly check functions. Davie s controller is for ....

Brendan Traw and Jon Smith. A high performance host interface for atm networks. In Proceedings of SIGCOMM, September 1991. Zurich. This work was partly funded by Esprit project OSI 95: High performance OSI protocols with multimedia support on HSLANS and B-ISDN. 11--13

....host interface takes a lot of time. Thus, the design of the HIF should not force DTM drivers to copy data between host 3 A B 1 4 2 Node Nr of slots Fiber A Fiber B December 2, 1993 5:27 pm 17 memory and the HIF. Similar design considerations have been made for other host interfaces, see [3][21]. FIGURE 10. Host interface To avoid copying of data the HIF is based on a shared memory accessed both by the host and the HIF. Such a design has been used also by others for the same reason, see for instance [3] In the shared memory, the host writes data to be sent on the network, and reads data ....

C.B.S. Traw and J.M. Smith, "A High-Performance Host Interface for ATM Networks ", In Proc. ACM SIGCOMM `91, Zurich, Sep. 1991.

....of applications for actual users at remote sites. The geographical topology of Aurora is illustrated in Figure 7. MIT Penn BCR IBM Figure 7: Aurora Geography. Aurora did not interconnect supercomputers. Rather, the connections are from remote display to workstation, and workstation to workstation [Traw Smith 91] The focus on workstation technology was driven by two factors: 1. Supercomputers are expensive, and networking research does not motivate their purchase. 2. Interesting networks are large in both bandwidth and scale. The rarity of supercomputers limits the ability of testing scalability with ....

....InterHost ATM face GLINK GLINK IBM RS 6000 Model 360 64MB MNFS Server IBM RS 6000 Model 360 MNFS Client 32MB OC 48 155Mb s STS 3c 10 Mb s ethernet MUX MUX Bellcore SUNSHINE SUNSHINE Penn 80 Miles Figure 8: ATM WAN Platform. workstations connected to the testbed with an ATM host interface [Traw Smith 91] designed at Penn. Between any two RS 6000s are a number of components. Each of which is summarized as to their operation. First, the host interface [Traw Smith 91] designed at Penn, operates at 155Mb s and uses two microchannel slots in the backplane. One for transmit and one for receive. 2 ....

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C. Brendan S. Traw & Jonathan M. Smith. A High-Performance Host Interface for ATM Networks. Proceedings, SIGCOMM 1991, September 4-6, 1991, pp. 317-325. Zurich, SWITZERLAND.

....our results show how to give good performance to best effort traffic while making efficient use of the resources left over by real time traffic. Fifth, our results may find application in local area ATM networks. ATM is rapidly gaining popularity in local area environments [3] 17] 22] 64] [95]. This popularity is due both to the service integration advantages of cell based networks over packet based networks and to the benefits of point to point networks over broadcast networks [87] Many of the traffic multiplexing issues we have addressed in the context of wide area networks also ....

C. B. Traw and J. M. Smith, A High Performance Host Interface for ATM Networks, Proc. of ACM SIGCOMM '91, Zurich, Switzerland, September, 1991.

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C. B. S. Traw and J. M. Smith, A High-Performance Host Interface for ATM Networks, Proceedings ACM SIGCOMM '91, Zurich, September 1991.

....for actual users at remote sites. The geographical topology of Aurora is illustrated in Figure 3.9. MIT Penn BCR IBM Figure 3.9: Aurora Geography. Aurora did not interconnect supercomputers. Rather, the connections are from remote display to workstation, and workstation to workstation [Traw Smith 91] The focus on workstation technology was driven by two factors: 1. Supercomputers are expensive, and networking research does not motivate their purchase. 2. Interesting networks are large in both bandwidth and scale. The rarity of supercomputers limits the ability of testing scalability with ....

....MNFS Client Model 360 32 MB IBM RS 6000 MNFS Client Model 360 32 MB IBM RS 6000 MNFS Client IBM RS 6000 MNFS Client IBM RS 6000 MNFS Client IBM RS 6000 Model 960 128 MB Model 580 64 MB Model 320 32 MB MNFS SERVER 136 Miles Figure 3.10: ATM WAN Platform. an ATM host interface [Traw Smith 91] designed and implemented at Penn. Between any two RS 6000s are a number of components. Each of which is summarized as to their operation. First, the host interface [Traw Smith 91] operates at 155 Mb s and uses two microchannel slots in the backplane. One is for transmit and one is for ....

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C. Brendan S. Traw & Jonathan M. Smith. A High-Performance Host Interface for ATM Networks. Proceedings, SIGCOMM

....and verification, segmentation, and reassembly are performed in high density programmable logic. The host is responsible for all higher level activities. This combination meets our goals and provides an excellent balance between performance and flexibility. Since we last reported on this work [5], we have been carrying this philosophy through to a realization. Here, we update our discussion of the architecture, detail the host software, and present some initial performance results. 2. Hardware This Host Interface is comprised of two logical sections, each of which occupies a standard ....

C. Brendan S. Traw and Jonathan M. Smith, "A HighPerformance Host Interface for ATM Networks," in Proceedings, SIGCOMM 1991, Zurich, SWITZERLAND (September 4-6, 1991), pp. 317-325.

.... ATM cell segmentation Network Interface (Control) Host Board Video Interface Host ATM Micro Channel Bus Video Stream ATM Cell Camera Bus based Video Board Figure 5: Comparison of our setup and an ATM cell camera. the video stream is sent directly from the Video Board to the ATM Host Interface [18] with minimal manipulation by the host CPU. The same Host Interface is also able to handle data from other devices. If, at some later point, an ATM cell camera is required, we will simply combine the Video Board with the Host Interface. We believe that combining the two boards is much easier than ....

C. B. S. Traw and J. M. Smith, A High-Performance Host Interface for ATM Networks, Proceedings ACM SIGCOMM '91, Zurich, September 1991.

....1 represents a logical OC 12. The point of this configuration is to first build independent plaNET (plaNET is the follow on to PARIS [4] and Sunshine [13] networks. These independent networks will be interconnected in order to understand interoperability of the technologies. Our host interface [22] is intended for the Sunshine ATM logical topology. Not For Distribution;Professional Review ONLY 3 1.3. Goals and Design Philosophy The research goals are as follows: 1) A hardware software architecture which is flexible and allows experimentation with portions of the protocol stack. 2) ....

....and is the approach we intend to try next. 4.3. Reassembler Software The reassembler software is considerably more complex than the segmenter software, since its activation is controlled by external events such as arriving cells. We have avoided the use of interrupts in our interface system [22] due to the software overhead, since with rapid arrival of small data objects (such as ATM cells) the interrupt service time can exceed the data service time. This remains true for considerably larger aggregations of cells. Without interrupts, however, the host is obligated to poll the interface. ....

C. Brendan S. Traw and Jonathan M. Smith, "A High-Performance Host Interface for ATM Networks," in Proceedings, SIGCOMM 1991, Zurich, SWITZERLAND (September 4-6, 1991), pp. 317-325.

....the interface can use this information as input to its rate control algorithms. The interface uses four STS 3c framers to provide a total bandwidth of 622 Mbps. These will feed into a 4 to 1 multiplexor to allow connection to a single STS 12 link. 4.2. 2 ATM interface for RS 6000 This interface [34] migrates a carefully selected set of protocol processing functions into hardware, and connects an IBM RS 6000 workstation to an STS 3c line carrying ATM cells. It is highly parallel and a pure hardware solution. There is a clean separation between the interface functions, such as segmentation ....

C. B. S. Traw and J. M. Smith. A high-performance host interface for ATM networks. To appear in Proc. ACM SIGCOMM '91, Zurich, September 1991.

....Despite rapid advances in workstation processor and memory subsystem performance, the next generation of high speed (Gbps) wide area networks [11] threatens to exceed the data management capabilities of the hosts. To assist these hosts, specialized host interfaces are being developed at Penn [12], Bellcore [7] Carnegie Mellon Fore Systems [4] and elsewhere. The host interface work at Penn has been centered on developing a high performance host interface for workstation hosts in the AURORA Gigabit Testbed environment [3] We have chosen to focus on workstations since we believe that they ....

....is gained from the reprogrammability of the host interface behavior. However, this approach is more costly, and extremely careful programming is required to achieve tight performance goals, especially when portions of multiple protocol stacks must be supported. Since we last reported on this work [12], we have been carrying our design philosophy through to a realization. Here, we update our discussion of the architecture, detail the host software, and present performance results. 2. Hardware This Host Interface is comprised of two logical sections, each of which occupies a standard sized ....

[Article contains additional citation context not shown here]

C. Brendan S. Traw and Jonathan M. Smith, "A High-Performance Host Interface for ATM Networks," in Proceedings, SIGCOMM 1991, Zurich, SWITZERLAND (September 4-6, 1991), pp. 317-325.

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C. Traw, S. Brendan, and J. M. Smith, "A HighPerformance Host Interface for ATM Networks," Proceedings of the Symposium on Communications Architectures and Protocols, ACM SIGCOMM 1991, ACM Computer Communication Review, vol. 21, no.

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Traw, S.B.C, Smith, J.M. "A High-Performance Host Interface for ATM Networks", Proceedings of SIGCOMM-91, pp. 317-325, August 1991.

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C.B.S. Traw and J.M Smith, "A High-Performance Host Interface for ATM Networks", Distributed Systems Laboratory, University of Pennsylvania.

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