T. V. Souvignier, M. Oberg, P. H. Siegel, R. E. Swanson, and J. K. Wolf, "Turbo decoding for partial response channels," IEEE Trans. Commun., vol. 48, pp. 1297--1308, Aug. 2000. Home/Search Document Details and Download
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VLSI Architectures for Iterative Decoders in.. - Yeo, Pakzad.. (2001) (4 citations) (Correct)
....Terms Iterative decoders, LDPC codes, magnetic recording, turbo codes, VLSI architectures. I. INTRODUCTION A TURBO encoder using serial concatenation of a convolutional code or Low Density Parity Check (LDPC) code with a partial response channel acting as the inner coder is shown in Fig. 1 [1]. The iterative decoder (Fig. 2) uses a combination of soft input soft output (SISO) decoders separated by interleavers, and the inverse, We present SISO decoder implementations that employ either the MAP Algorithm (BCJR) 2] Soft Output Viterbi Algorithm (SOVA) 3] or the LDPC decoding ....
T. Souvignier, M. Oberg, P. Siegel, R. Swanson, and J. Wolf, "Turbo decoding for partial response channels," IEEE Trans. Commun., vol. 48, no. 8, Aug. 2000.
A 500-Mb/s Soft-Output Viterbi Decoder - Engling Yeo Student (Correct)
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T. V. Souvignier, M. Oberg, P. H. Siegel, R. E. Swanson, and J. K. Wolf, "Turbo decoding for partial response channels," IEEE Trans. Commun., vol. 48, pp. 1297--1308, Aug. 2000.
Achievable Information Rates and Coding For Mimo Systems.. - Zhang, Duman, Kurtas (2004) (Correct)
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T. V. Souvignier, M. berg, P. H. Siegel, R. E. Swanson, and J. K. Wolf, "Turbo decoding for partial response channels," IEEE Trans. Commun., vol. 48, pp. 1297--1308, Aug. 2000.
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