D. J.-H. Huang, A. B. Kahng and C.-W. A. Tsao: "On the Bounded-Skew Clock and Steiner Routing Problems", Proc. of International Conference on Computer Aided Design, pp. 508--513(1995).  Home/Search   Document Details and Download   Summary   Related Articles   Check

....that BMM is much more efficient than FMM in terms of reducing the power dissipation. If we take the buffer size into account in the above calculation, then there would be a larger difference in the capacitance (i.e. power) because FMM uses a lot bigger buffer than 2 For Instance, Huang et al. [13] showed the total net length of zero skew tree can be more than 1.5 times larger than that of steiner. Table 2: Skew and Phase Delay with BMM Clock Skew(ps) Phase Area Circuit Intra Inter Over Delay MR MR all (ns) mm 2 ) S9234 40 13 51 0.89 4.5 S13207 120 23 110 1.10 8.4 S15850 130 25 ....

D. J.-H. Huang, A. B. Kahng and C.-W. A. Tsao: "On the Bounded-Skew Clock and Steiner Routing Problems", Proc. of International Conference on Computer Aided Design, pp. 508--513(1995).

.... Recently, it has been pointed out that it is almost impossible to achieve exact zero skew in real designs [8] In fact, it is neither necessary nor desirable to achieve zero skew [23] For low power designs, the bounded skew tree (BST) rather than ZST has been proposed to reduce the clock power [9]. The BST algorithms assume a fixed nonzero skew bound; hence, the actual design requirement is for a bounded skew routing tree. For timing optimization in lower level designs of VLSI, buffer insertion (or fanout optimization) interconnect topology optimization, and wire sizing play important ....

D. Huang, A. Kahng, and C. Tsao, "On the bounded-skew clock and steiner routing problems," Proceedings of 32nd Design Automation Conference, pp. 508-513, 1995.

....to minimize the maximum or critical delay of the net. Another category of problems closely related to performancedriven routing is clock routing, which aims at reducing the maximum delay skew among sinks of a net. There have been numerous approaches for zero skew solutions[9, 11] recent work by [3, 4] extends the existing methods to address the bounded skew problem. Most of these existing performance driven and clock routing algorithms are in fact pre routing methods which have several limitations: 1. The optimal routing topology for each net is constructed individually without considering its ....

D. Huang, A. Kahng, A. Tsao, "On the BoundedSkew Clock and Steiner Routing Problems", Proc. DAC 32, pp. 508-513, 1995.

....variant is Greedy DME [9] ffl More recently, it has been noted that exact zero skew comes at the price of increased wiring area and higher power dissipation, even as circuits still operate correctly within some non zero skew bound. Hence, the bounded skew tree (BST) problem was addressed in [14, 7, 16, 6]. The BST problem provides a continuous tradeoff between two classic routing problems the zero skew tree (ZST) problem for skew bound B = 0, and the rectilinear Steiner minimum tree (RSMT) problem for B = ffl Finally, Friedman and coauthors have pointed out that the classic zero skew ....

J. H. Huang, A. B. Kahng, and C.-W. A. Tsao, "On the bounded-skew clock and steiner routing problems", Proc. ACM/IEEE Design Automation Conf., pp. 508--513, 1995.

....for extension into more sophisticated clock tree constructions. Finally, a more practical clock tree synthesis approach will use a bounded skew, rather than an exact zero skew, objective. The DME approach can be modified to use the concept of a merging area in the bounded skew tree construction [10]. Acknowledgments We thank Mr. Qing Zhu and Professor Wayne W. M. Dai of UC Santa Cruz for providing preprints of their work. Charles J. Alpert, Lars Hagen, Kenneth D. Boese and Jenhsin Huang provided helpful comments on early drafts. a) Zhu Dai [15] cost=167.9) b) Planar DME (cost=136.0) ....

J. H. Huang, A. B. Kahng and C.-W. A. Tsao, "On the Bounded-Skew Clock and Steiner Routing Problems", UCLA CS Dept. technical report TR-940026, 1994.

.... single layer clock routing trees with bounded, rather than exactly zero, skew; such constructions are useful in the engineering of general clock distribution solutions, where skew and other attributes are controlled by a mix of topology generation, embedding, wiresizing and buffer optimization [7, 14, 15, 20] ....

J. H. Huang, A. B. Kahng and C.-W. A. Tsao, "On the Bounded-Skew Clock and Steiner Routing Problems", Proc. 32nd ACM/IEEE Design Automation Conf., San Francisco, June 1995, pp. 508-513.

....Skew Routing Tree (BST) Problem: Given a set S = fs 1 ; s ng ae R 2 of sink locations and a skew bound B, find a routing topology G and a minimum cost clock tree TG (S) that satisfies skew(TG (S) B. 1.1. The Extended DME Algorithm The BST problem has been previously addressed in [16], 11] 9] Their basic method, called the Extended DME (Ex DME) algorithm, extends the DME algorithm of [3] 6] 5] 12] via the enabling concept of merging region, which is a set of embedding points with feasible skew and minimum merging cost if no detour wiring occurs 1 . For a fixed ....

....in constructing a bounded skew tree: i) a bottom up phase to construct a binary tree of merging regions which represent the loci of possible embedding points of the internal nodes, and (ii) a top down phase to determine the exact locations of the internal nodes. The reader is referred to [11] [16], 9] 10] for more details (the latter is available by anonymous ftp) In the remainder of this subsection, we sketch several key concepts from [11] 16] 9] Let max t(p) and min t(p) denote the maximum and minimum delay values (max delay and min delay, for short) from point p to all leaves in ....

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J. H. Huang, A. B. Kahng, and C.-W. A. Tsao. On the bounded-skew clock and steiner routing problems. In Proc. ACM/IEEE Design Automation Conf., pages 508--513, 1995. Also available as technical report CSD-940026x, Computer Science Dept., UCLA.

....(2) Each node v is embedded at the location in mr(v) that is closest to the location of its parent p, even if jev j d(mr(v) l(p) Let v 2 G have children a and b with merging regions mr(a) and mr(b) which are both well behaved octilinear regions. We show the following properties of JR(v) in [12]. Lemma 1: Any rectilinear line segment l 2 JR(v) is wellbehaved. Lemma 2: Suppose La and Lb are parallel vertical line segments, and l h is a horizontal line segment in JR(v) Denote skew const(lh) as the portion of l h with constant skew. Then skew const(lh) FMS(lh ) FMS(JR(v) ....

....and has cost(T 0 ) cost(T ) Thus, we have: Theorem 2: When B = 1, for any sink set S and topology G, Ex DME returns a Steiner tree over S with minimum cost for topology G. However, Ex DME is not necessarily optimal for any intermediate value of B. A four sink counterexample is given in [12]. 4 Second Tradeoff: Unrestricted Case We now consider the variant where the topology is not fixed and the embedding is unrestricted. Our Extended Greedy DME (ExGDME) algorithm matches the best known heuristic for the zero skew limiting case, and very closely matches the performance of the best ....

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D. J. H. Huang, A. B. Kahng and C.-W. A. Tsao, "On the BoundedSkew Clock and Steiner Routing Problems", UCLACS Dept. technical report TR-940026x, 1994.

....(S) that satisfies skew(T G (S) B. 1 This work was supported by a grant from Cadence Design Systems. A. B. Kahng is currently Visiting Scientist (on sabbatical leave from UCLA) and C. W. A. Tsao is Senior Member of Technical Staff, at Cadence. The BST problem has been previously addressed in [12, 4, 3]. The basic Extended DME (Ex DME) approach extends the DME algorithm [2, 5] via the concept of a merging region, which is a set of embedding points with feasible skew and minimum merging cost if no detour wiring occurs. For a fixed tree topology, Ex DME follows the 2 phase approach of the DME ....

....constructing a bounded skew tree: i) a bottom up phase to construct a binary tree of merging regions which represent the loci of possible embedding points of the internal nodes, and (ii) a top down phase to determine the exact locations of the internal nodes. We now review necessary concepts from [4, 12, 3]. For a node v 2 G with children a and b, its merging region, denoted mr(v) is constructed from the so called joining segments L a 2 mr(a) and L b 2 mr(b) which are the closest boundary segments of mr(a) and mr(b) In practice, L a and L b are either a pair of parallel Manhattan arcs (i.e. ....

[Article contains additional citation context not shown here]

J. H. Huang, A. B. Kahng, and C.-W. A. Tsao, "On the bounded-skew clock and steiner routing problems", Proc. ACM/IEEE Design Automation Conf., pp. 508--513, 1995.

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