| B. Obreni et al., \Using Emulations to Enhance the Performance of Parallel Architectures," IEEE Trans. on Parallel and Distributed Systems, vol. 10, # 10, pp. 1067-1081, Oct. 1999. |
....of practical use, and (b) the inter embedding support inside the HD is actually more complex and restricted than in either the HC or BDG. Other comparative attributes of the HD are detailed in Tables I and II. Similarly, a variety of other interconnects and emulation approaches exist in literature [11, 24, 30, 31, 36] among others which aim at providing versatile, ecient and realizable networks that support a wide range of embeddings. The purpose behind this discussion is to highlight that the strengths of an interconnect are conventionally assessed by either (a) a demonstration of direct graph embeddings ....
B. Obreni et al., \Using Emulations to Enhance the Performance of Parallel Architectures," IEEE Trans. on Parallel and Distributed Systems, vol. 10, # 10, pp. 1067-1081, Oct. 1999.
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