B. Iyer, R. Karri, I. Koren. "Phantom redundancy: a high-level synthesis approach for manufacturability", Proceedings of lEEE/ACM International Conference on Computer-Aided Design, pp. 658-661, Nov. 1995. Home/Search Document Details and Download
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Heterogeneous BISR-approach using System Level Synthesis.. - Inki Hong Miodrag (Correct)
....[18] concentrated on designs with self recovery from transient faults using micro roll back and checkpoint insertion. Karri and Orailoglu [7] 8] 14] develop a spectrum of behavioral techniques which minimize the fault tolerance overhead in application specific designs. Recently, Iyer et al. [6] develop 5 a high level synthesis approach to optimize manufacturability using redundant interconnects. Guerra et al. 5] develop a heterogeneous BISR behavioral synthesis system, which explores flexibility in scheduling a single task during high level synthesis so that the resulting design is ....
B. Iyer, R. Karri, I. Koren, "Phantom Redundancy: A High-Level Synthesis Approach for Manufacturability, " International Conference on Computer-Aided Design, pp. 658-661, 1995.
High-Level Synthesis of Gracefully Degradable ASICs - Chan, Orailoglu (1996) (2 citations) (Correct)
....of the reconfigurable design problem requires sophisticated planning in both operation scheduling and hardware binding, and these tasks fall squarely within the problem domain of high level synthesis. In fact, high level synthesis of fault tolerant designs has been investigated and implemented in [3], 7] and [8] Moreover, the procedural approaches in high level # This work is supported by the National Science Foundation under grant number MIP 9308535. synthesis advocate a systematic definition of the underlying architecture, which in turn assists efficient planning of reconfigurable ....
B. Iyer, R. Karri, and I. Koren. Phantom Redundancy: A High-Level Synthesis Approach for Manufacturability. In Proceedings of ICCAD, pages 658--661, November 1995.
Heterogeneous Built-in Resiliency of Application Specific.. - Kim, Karri (1996) (1 citation) (Correct)
....transformation based methods for fault tolerance against transient faults. Guerra et al. 3] presented the first work which concentrates on permanent faults. They showed how fault tolerance achieved using a set of spare units can be used for yield and productivity enhancement. Recently Iyer et al. [4] introduced a method which explores trade offs between performance and yield. Automatic synthesis of self recovering microarchitectures has been previously addressed. An algorithm that intertwines checkpoint insertion and scheduling (of operations in the input algorithm to clock cycles) to ....
B. Iyer, R. Karri, I. Koren, "Phantom Redundancy: A High-Level Synthesis Approach for Manufacturability," ICCAD 95, pp. 658-661, 1995.
Exploiting Idle cycles for Algorithm Level Re-Computing - Wu, Karri (2002) (1 citation) Self-citation (Karri) (Correct)
....adds extra with lessthanproportionalincreaseinhardware. interconnect so as to render the resulting micro Blough et al. presented an algorithm to find the optimal architecture reconfigurable in the presence of any (single) checkpoints in a roll back based system [8] The functionalunit failure [9]. algorithm either searches for the shortest length recovery Algorithm level re computing is a time redundancy point path by a given maximum number of registers, or based CED technique that uses two types of computations searches for the lowest cost recovery point by given the the normal ....
B. Iyer, R. Karri, I. Koren. "Phantom redundancy: a high-level synthesis approach for manufacturability", Proceedings of lEEE/ACM International Conference on Computer-Aided Design, pp. 658-661, Nov. 1995.
Heterogeneous BISR-approach using System Level Synthesis.. - Inki Hong Miodrag Self-citation (Karri) (Correct)
....selection has been recognized as an important system level synthesis topic, and several approaches have been proposed [9] Karri and Orailoglu [4] 8] develop a spectrum of behavioral techniques which minimize the fault tolerance overhead in application specific designs. Recently,Iyer et al. [3]develop a high level synthesis approach to optimize manufacturability using redundantinterconnects. Guerra et al. 2] develop a heterogeneous BISR behavioral synthesis system, which explores flexibility in scheduling a single task during high level synthesis so that the resulting design is ....
B. Iyer, R. Karri, I. Koren, "Phantom Redundancy: A HighLevel Synthesis Approach for Manufacturability," International Conference on Computer-Aided Design, pp. 658-661, 1995.
Heterogeneous BISR-approach using System Level Synthesis.. - Hong, Potkonjak, Karri (1996) Self-citation (Karri) (Correct)
....[17] concentrated on designs with self recovery from transient faults using micro roll back and checkpoint insertion. Karri and Orailoglu [6] 7] 13] develop a spectrum of behavioral techniques which minimize the fault tolerance overhead in application specific designs. Recently, Iyer et al. [5] develop a high level synthesis approach to optimize manufacturability using redundant interconnects. Guerra et al. 4] develop a heterogeneous BISR behavioral synthesis system, which explores flexibility in scheduling a single task during high level synthesis so that the resulting design is ....
B. Iyer, R. Karri, I. Koren, "Phantom Redundancy: A High-Level Synthesis Approach for Manufacturability," International Conference on Computer-Aided Design, pp. 658-661, 1995.
Maximizing The Fault-Tolerance Of Application Programmable .. - Kim, Karri, Potkonjak (Correct)
No context found.
B. Iyer, R. Karrl, I. Koren, "Phantom Redundancy: A High-Level Synthesis Approach for Manufactnrability," ICCAD 95, pp. 658-661, 1995.
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