A. Kagi, "Mechanisms for Efficient Shared-Memory, Lock-Based Sychronization," PhD thesis, Univ. of Wisconsin, Madison, 1999. Home/Search Document Details and Download
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A System-on-a-Chip Lock Cache with Task Preemption Support - Akgul, Lee (2001) (Correct)
....mechanisms, such as direct cache to cache transfer during hand off and queue states to be kept in the cache lines. Moreover, the benefit of collocation is dependent on the cache line size; if the shared data does not fit in the cache line, that shared data will not benefit from collocation [12]. We have devised a novel synchronization architecture as a solution to the processor synchronization problems when encountered in a System on a Chip (SoC) Specifically, we propose moving some of the synchronization to hardware, which, in SoC design, can execute at the same clock speed as the ....
A. Kagi, Mechanisms for Efficient Shared-Memory LockBased Synchronization, Ph.D. Thesis, Computer Sciences, University of Wisconsin, Madison, 1999.
Shared Memory Parallelization of Data Mining Algorithms.. - Jin, Yang, Agrawal (2004) (1 citation) (Correct)
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A. Kagi, "Mechanisms for Efficient Shared-Memory, Lock-Based Sychronization," PhD thesis, Univ. of Wisconsin, Madison, 1999.
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